aboutsummaryrefslogtreecommitdiff
path: root/sim/mips
AgeCommit message (Expand)AuthorFilesLines
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2-2/+9
2016-01-04sim: punt x86-specific bswap logicMike Frysinger2-21/+6
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger2-3/+5
2016-01-03sim: drop host endian configure optionMike Frysinger3-261/+232
2016-01-03sim: convert to bfd_endianMike Frysinger4-35/+42
2016-01-02sim: delete dead current_state globalsMike Frysinger2-5/+4
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker21-21/+21
2015-12-30sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to...Mike Frysinger2-20/+22
2015-12-27sim: unify sim-hloadMike Frysinger2-1/+4
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger3-6/+6
2015-12-26sim: mips: delete mmu stubs to move to common sim_{read,write}Mike Frysinger6-355/+153
2015-12-24sim: mips: delete TARGET_TX3904 defineMike Frysinger3-2/+5
2015-12-24sim: mips: move SIM_QUIET_NAN_NEGATED to sim-main.hMike Frysinger3-4/+8
2015-12-24sim: make LMA loading the default for all targetsMike Frysinger2-7/+4
2015-12-24sim: enable watchpoint module everywhereMike Frysinger2-4/+4
2015-12-24sim: delete SIM_HAVE_FLATMEM supportMike Frysinger2-3/+4
2015-12-24sim: delete SIM_HAVE_SIMCACHEMike Frysinger2-6/+4
2015-12-15Fix invalid left shift of negative valueDominik Vogt2-1/+6
2015-11-17sim: always enable modulo memoryMike Frysinger2-1/+4
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger2-2/+4
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger3-20/+11
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett16-1462/+7203
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-158/+158
2015-06-23sim: use AS_HELP_STRING everywhereMike Frysinger2-16/+33
2015-06-12sim: update configure.in->configure.ac docsMike Frysinger3-7/+12
2015-06-12sim: drop -DTRACE from configureMike Frysinger2-3/+7
2015-06-12sim: mips: switch to common WITH_TRACE_ANY_PMike Frysinger4-30/+36
2015-04-18sim: clean up duplicate sim-engine hooksMike Frysinger2-4/+5
2015-04-18sim: unify SIM_CPU definitionMike Frysinger2-3/+4
2015-04-18sim: unify sim_cia definitionMike Frysinger2-2/+4
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger5-11/+19
2015-04-15sim: unify sim-cpu usageMike Frysinger3-6/+5
2015-04-13sim: fix the PKGVERSION defineMike Frysinger2-2/+6
2015-04-13sim: mips: convert to sim-cpuMike Frysinger4-11/+44
2015-04-13sim: mips: fix prototype warningsMike Frysinger2-63/+43
2015-04-12sim: arm/mips: fix sim_read/sim_write linkage errorsMike Frysinger2-1/+5
2015-04-06sim: move sim-engine.o/sim-hrw.o to the common listMike Frysinger2-1/+4
2015-04-02Regenerate configure in simH.J. Lu1-2/+2
2015-04-01Regenerate configure in simH.J. Lu1-4/+6
2015-04-01sim: run: punt!Mike Frysinger2-6/+4
2015-04-01sim: update zlib handlingMike Frysinger3-84/+17
2015-03-24sim: m68hc11/mips/mn10300/v850: add basic sim_pc_getMike Frysinger2-0/+9
2015-03-24sim: clean up SIM_HAVE_BIENDIANMike Frysinger3-7/+5
2015-03-24sim: fix sim-hardware configure optionMike Frysinger2-6/+6
2015-03-23sim: drop support for requiring hw supportMike Frysinger2-10/+9
2015-03-23sim: dv-sockser: move build to common dirMike Frysinger4-13/+13
2015-03-23sim: dv-sockser: add stub funcs when not availableMike Frysinger3-18/+5
2015-03-16sim: rename tconfig.in to tconfig.hMike Frysinger4-10/+12
2015-03-15sim: dv-sockser: push module init prototype downMike Frysinger2-13/+5
2015-03-14sim: make nrun the default run programMike Frysinger2-4/+4
generated by cgit v1.1 at 2024-12-17 18:45:26 +0000