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AgeCommit message (Expand)AuthorFilesLines
1998-02-11Update DMA register addressesJames Lemke1-2/+2
1998-02-11- PKE simulation code almost complete. Still missing:Frank Ch. Eigler2-811/+1046
1998-02-10* Many changes to make sky sim build with --enable-sim-warnings.Ian Carmichael6-27/+34
1998-02-10* Make it so vu.bin is an optional file.Ian Carmichael1-7/+6
1998-02-09* Add hardware_init hook.Ian Carmichael2-1/+14
1998-02-07Fix double dependency for itable.[hc]. Was causing both the mips16 and theAndrew Cagney1-0/+4
1998-02-07- Added almost all code needed for PKE0/1 simulation. ConsidersFrank Ch. Eigler2-95/+1457
1998-02-06sky sanitizationDoug Evans1-0/+30
1998-02-06 * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars.Doug Evans3-55/+92
1998-02-06Prepend sky- to sky header file names.Doug Evans1-1/+1
1998-02-06Second pass at moving sky files into mips dir,Doug Evans4-8/+8
1998-02-06First pass at moving sky stuff from ../txvu to mips dir.Doug Evans7-0/+923
1998-02-05New files, update .SanitizeAndrew Cagney2-0/+16
1998-02-03IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,Andrew Cagney5-73/+216
1998-02-02Make IGEN the generator for all but mips16 simulators.Andrew Cagney1-5/+17
1998-02-02Add support for configuring the size of the floating point unit (fp_word).Andrew Cagney3-19/+81
1998-02-02Rewrite the mipsI/II/III pending-slot code.Andrew Cagney3-109/+163
1998-02-02Always compile FP code (test for FP at run-time).Andrew Cagney2-129/+102
1998-02-01mips: Add multi-processor support for r5900. Others might work.Andrew Cagney6-324/+460
1998-01-31Add config support for the size of the target address and OF cell.Andrew Cagney2-24/+53
1998-01-31mips - for r5900 generate igen simulator.Andrew Cagney3-9/+16
1998-01-31igen: Fix SMP simulator generator support.Andrew Cagney3-4/+16
1998-01-21Use macro GPR_SET(N,VAL) to clear zero registers.Andrew Cagney4-73/+85
1998-01-20* aclocal.m4: Recognize --enable-maintainer-mode.Doug Evans2-47/+73
1998-01-16Document existence of old (gencode) and new (igen) MIPS ISA simulators.Andrew Cagney1-0/+39
1998-01-05 * interp.c (sim_monitor): Handle Densan monitor outbyteMark Alexander2-0/+13
1997-12-29 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).Felix Lee2-284/+284
1997-12-15In nrun.c, look for sigaction & SA_RESTART. When both present,Andrew Cagney1-0/+5
1997-12-13For MADD et.al. instructions sign extend 32 bit result assigned to aAndrew Cagney2-2/+9
1997-12-12 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 orJeff Law3-43/+55
1997-12-11 * mips.igen (MSUB): Fix to work like MADD.Jeff Law3-568/+476
1997-12-09For bfd, add vr5400 and vr5000 mips machine variants to list of machines.Andrew Cagney2-11/+17
1997-12-04Regenerate configure files.Doug Evans2-72/+122
1997-12-03Missing change log entry.Andrew Cagney1-0/+2
1997-11-26Fix typo in format argument to sim_io_eprintf.Andrew Cagney2-3/+5
1997-11-26Move MDMX instructions which are public knowledge from vr5400.igenAndrew Cagney4-441/+1313
1997-11-25sanitize-r5900 not v5900Andrew Cagney1-2/+2
1997-11-25vr5400 sanitize cleanupsAndrew Cagney1-4/+12
1997-11-24SanitizationAndrew Cagney1-1/+0
1997-11-20o Add SIM_SIGFPE to sim-signalsAndrew Cagney3-18/+12
1997-11-20Allow reads/writes to C0_CONFIG register.Andrew Cagney3-13/+40
1997-11-18 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).Doug Evans1-0/+4
1997-11-14 * mips.igen: Tag vr5000 instructions.Andrew Cagney2-0/+35
1997-11-11Make the signess of compares between GPR's explicit using a cast toAndrew Cagney2-61/+39
1997-11-11Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,Andrew Cagney5-121/+396
1997-11-06Replace global IPC with function argument cia or current instructionAndrew Cagney5-60/+78
1997-11-06IGEN likes to cache the current instruction address (CIA). Change theAndrew Cagney5-112/+172
1997-11-05Add option --enable-sim-igen to mips configuration. Allows user toAndrew Cagney2-17/+50
1997-11-05Rewrite the MIPS simulator's memory model so that it uses the genericAndrew Cagney5-544/+225
1997-11-05Delete -l and -n options, didn't do anything.Andrew Cagney3-51/+28