aboutsummaryrefslogtreecommitdiff
path: root/sim/mips/sim-main.h
AgeCommit message (Collapse)AuthorFilesLines
2022-02-04sim: mips: Add simulator support for mips32r6/mips64r6Faraz Shahbazker1-11/+83
2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
2022-02-04sim: Allow toggling of quiet NaN-bit semanticsFaraz Shahbazker1-3/+0
IEEE754-1985 specifies the top bit of the mantissa as an indicator of signalling vs. quiet NaN, but does not define the precise semantics. Most architectures treat this bit as indicating quiet NaN, but legacy (pre-R6) MIPS goes the other way and treats it as signalling NaN. This used to be controlled by a macro that was only defined for MIPS. This patch replaces the macro with a variable to track the current semantics of the NaN bit and allows differentiation between older (pre-R6) and and newer MIPS cores. 2022-02-01 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-fpu.c (_sim_fpu): New. (pack_fpu, unpack_fpu): Allow reversal of quiet NaN semantics. * sim-fpu.h (sim_fpu_state): New struct. (_sim_fpu): New extern. (sim_fpu_quiet_nan_inverted): New define. sim/mips/ChangeLog: * cp1.h (fcsr_NAN2008_mask, fcsr_NAN2008_shift): New. * mips.igen (check_fpu): Select default quiet NaN mode for legacy MIPS. * sim-main.h (SIM_QUIET_NAN_NEGATED): Remove.
2022-01-06sim: mips: migrate to standard uintXX_t typesMike Frysinger1-49/+49
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-01sim: mips: clean up bad style/whitespaceMike Frysinger1-7/+7
This doesn't fix all the problems, but grabs a bunch of the more obvious ones.
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-09-09sim: mips: delete unused PSIZE defineMike Frysinger1-2/+0
It's unclear what this define is for as it appears to be unused, and has never been used in the history of the mips sim. Delete it to tidy up, and to fix build errors for Windows targets that have a standard "PSIZE" struct in their system headers. This doesn't show up yet as most sim files don't include many system headers, but enabling sockser code for mingw uncovers the conflict. Unfortunately the error produced by gcc is inscrutable, but running it through the preprocessor manually manages to provide a pointer to the underlying issue. $ i686-w64-mingw32-gcc ... -c -o dv-sockser.o ../../../../sim/mips/../common/dv-sockser.c <command-line>: error: expected identifier or '(' before numeric constant In file included from /usr/i686-w64-mingw32/usr/include/windows.h:71, from /usr/i686-w64-mingw32/usr/include/winsock2.h:23, from ../../gnulib/import/sys/socket.h:684, from ../../gnulib/import/netinet/in.h:43, from ../../../../sim/mips/../common/dv-sockser.c:39: /usr/i686-w64-mingw32/usr/include/wingdi.h:2934:59: error: unknown type name 'LPSIZE'; did you mean 'LPSIZEL'? 2934 | WINGDIAPI WINBOOL WINAPI GetAspectRatioFilterEx(HDC hdc,LPSIZE lpsize); | ^~~~~~ | LPSIZEL ... $ i686-w64-mingw32-gcc ... -E -dD -o dv-sockser.i ../../../../sim/mips/../common/dv-sockser.c $ i686-w64-mingw32-gcc -c dv-sockser.i In file included from /usr/i686-w64-mingw32/usr/include/windows.h:69, from /usr/i686-w64-mingw32/usr/include/winsock2.h:23, from ../../gnulib/import/sys/socket.h:684, from ../../gnulib/import/netinet/in.h:43, from ../../../../sim/mips/../common/dv-sockser.c:39: /usr/i686-w64-mingw32/usr/include/windef.h:104:9: error: expected identifier or '(' before numeric constant 104 | } SIZE,*PSIZE,*LPSIZE; | ^~
2021-06-16sim: mips: add printf attribute to trace funcMike Frysinger1-1/+1
This helps catch format errors in code, although they're all clean at this point already.
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger1-2/+0
Now that all ports have migrated to the new framework, drop support for the old sim_state_base layout.
2021-05-17sim: mips: invert sim_state storageMike Frysinger1-20/+4
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
This applies the second part of GDB's End of Year Procedure, which updates the copyright year range in all of GDB's files. gdb/ChangeLog: Update copyright year range in all GDB files.
2016-01-03sim: convert to bfd_endianMike Frysinger1-1/+1
Rather than re-invent endian defines, as well as maintain our own list of OS & arch-specific includes, punt all that logic in favor of the bfd ones already set up and maintained elsewhere. We already rely on the bfd library, so leveraging the endian aspect should be fine.
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2015-12-26sim: mips: delete mmu stubs to move to common sim_{read,write}Mike Frysinger1-18/+4
The only unique thing about mip's sim_{read,write} helpers is the call to address_translation on the incoming address. When we look closer at that function though, we see it's just a stub that maps physical to virtual, and the cache/return values are hardcoded. If we delete this function, we can then collapse all the callers and drop the custom sim_{read,write} logic entirely. Some day we might want to add MMU support, but when we do, we'll want to have the common layers handle things so all targets benefit.
2015-12-24sim: mips: move SIM_QUIET_NAN_NEGATED to sim-main.hMike Frysinger1-0/+3
We want to kill off tconfig.h, so move the one define mips still uses to sim-main.h.
2015-12-24sim: enable watchpoint module everywhereMike Frysinger1-4/+0
We build & bundle the watchpoint module everywhere, but we don't make the command line flags available by default. A few targets opted in, but most did not. Just enable the flag for everyone. Not all targets will respect the flags (making them nops), but shouldn't be a big deal. This is how we handle other common modules already.
2015-11-17sim: always enable modulo memoryMike Frysinger1-1/+0
Having this be a config option doesn't make sense: the code size is pretty much the same (as all the logic is still active), and if it's disabled, the sim throws an error if you try to use it. That means we can't break sims that weren't using it before by enabling it all the time.
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-0/+2
Other than the nice advantage of all sims having to declare one fewer common function, this also fixes leakage in pretty much every sim. Many were not freeing any resources, and a few were inconsistent as to the ones they did. Now we have a single module that takes care of all the logic for us. Most of the non-cgen based ones could be deleted outright. The cgen ones required adding a callback to the arch-specific cleanup func. The few that still have close callbacks are to manage their internal state. We do not convert erc32, m32c, ppc, rl78, or rx as they do not use the common sim core.
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett1-4/+43
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com> Ali Lown <ali.lown@imgtec.com> sim/common/ * sim-bits.h (EXTEND6): New macro. (EXTEND12): New macro. (EXTEND25): New macro. sim/mips/ * Makefile.in (tmp-micromips): New rule. (tmp-mach-multi): Add support for micromips. * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim that works for both mips64 and micromips64. (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and micromips32. Add build support for micromips. * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc, do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv, do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu, do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv, do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append, do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions. Refactored instruction code to use these functions. * dsp2.igen: Refactored instruction code to use the new functions. * interp.c (decode_coproc): Refactored to work with any instruction encoding. (isa_mode): New variable (RSVD_INSTRUCTION): Changed to 0x00000039. * m16.igen (BREAK16): Refactored instruction to use do_break16. (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models. * micromips.dc: New file. * micromips.igen: New file. * micromips16.dc: New file. * micromipsdsp.igen: New file. * micromipsrun.c: New file. * mips.igen (do_swc1): Changed to work with any instruction encoding. (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32 do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1 do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1 do_trunc_fmt): New functions, refactored from existing instructions. Refactored instruction code to use these functions. (RSVD): Changed to use new reserved instruction. (loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32 and micromips64 models. Added include for micromips.igen and micromipsdsp.igen Add micromips32 and micromips64 models. (DecodeCoproc): Updated to use new macro definition. * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di, do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu, do_seb, do_seh do_rdhwr, do_wsbh): New functions. Refactored instruction code to use these functions. * sim-main.h (CP0_operation): New enum. (DecodeCoproc): Updated macro. (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE, MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines. (sim_state): Add isa_mode field. sim/testsuite/sim/mips/ * basic.exp (run_micromips_test, run_sim_tests): New functions Add support for micromips tests. * hilo-hazard-4.s: New file. * testutils.inc (_dowrite): Changed reserved instruction encoding. (writemsg): Moved the la and li instructions before the data they are assigned to, which prevents a bug where MIPS32 relocations are used instead of micromips relocations when building for micromips.
2015-06-12sim: mips: switch to common WITH_TRACE_ANY_PMike Frysinger1-0/+4
We want to add new common trace helpers including "TRACE", so change the mips one to the new WITH_TRACE_ANY_P macro since they do the same thing.
2015-04-18sim: clean up duplicate sim-engine hooksMike Frysinger1-4/+0
Now that we've unified sim-cpu, we can delete the duplicate sim-engine hooks -- these targets defined these only because they didn't fully implement the sim-cpu callbacks.
2015-04-18sim: unify SIM_CPU definitionMike Frysinger1-3/+0
Since every target typedefs this the same way, move it to the common code. We have to leave Blackfin behind here for now because of inter-dependencies on types and headers: sim-base.h includes sim-model.h which needs types in machs.h which needs types in bfim-sim.h which needs SIM_CPU.
2015-04-18sim: unify sim_cia definitionMike Frysinger1-2/+0
Almost every target defines sim_cia the same way -- either using the address_word type directly, or a type of equivalent size. The only odd one out is sh64 (who has 32bit address_word and 64bit cia), and even that case doesn't seem to make sense. We'll put off clean up though of sh64 and at least set up a sensible default for everyone.
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger1-2/+0
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET} except the latter adds a layer of indirection via the sim state. This lets models set up different functions at runtime and doesn't reach so directly into the arch-specific cpu state. It also doesn't make sense to have two sets of macros that do exactly the same thing, so lets standardize on the one that gets us more.
2015-04-15sim: unify sim-cpu usageMike Frysinger1-5/+0
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the cpu state is multicore, and the STATE_CPU defines match, we can move it all to the common code.
2015-04-13sim: mips: convert to sim-cpuMike Frysinger1-4/+5
Make cpu allocation fully dynamic so we can leverage the common sim-cpu and its APIs.
2015-03-24sim: clean up SIM_HAVE_BIENDIANMike Frysinger1-3/+0
This define only applies when using the old run.o main. Document it as such, and delete it from mips/sh64 since both use nrun.o now.
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2014-01-07remove PARAMS from simTom Tromey1-18/+18
This removes the last uses of PARAMS from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * README-HACKING: Don't use PARAMS. * arm/wrapper.c: Don't use PARAMS. * bfin/sim-main.h: Don't use PARAMS. * common/callback.c: Don't use PARAMS. * common/cgen-trace.c: Don't use PARAMS. * common/run-sim.h: Don't use PARAMS. * common/run.c: Don't use PARAMS. * common/sim-base.h: Don't use PARAMS. * common/sim-load.c: Don't use PARAMS. * common/sim-options.h: Don't use PARAMS. * common/sim-trace.c: Don't use PARAMS. * common/sim-trace.h: Don't use PARAMS. * common/sim-utils.h: Don't use PARAMS. * cr16/cr16_sim.h: Don't use PARAMS. * cr16/gencode.c: Don't use PARAMS. * cr16/interp.c: Don't use PARAMS. * cr16/simops.c: Don't use PARAMS. * d10v/d10v_sim.h: Don't use PARAMS. * d10v/gencode.c: Don't use PARAMS. * d10v/interp.c: Don't use PARAMS. * d10v/simops.c: Don't use PARAMS. * erc32/erc32.c: Don't use PARAMS. * erc32/exec.c: Don't use PARAMS. * erc32/float.c: Don't use PARAMS. * erc32/func.c: Don't use PARAMS. * erc32/sis.c: Don't use PARAMS. * erc32/sis.h: Don't use PARAMS. * mips/interp.c: Don't use PARAMS. * mips/sim-main.h: Don't use PARAMS. * sh/interp.c: Don't use PARAMS. * v850/sim-main.h: Don't use PARAMS. * v850/v850_sim.h: Don't use PARAMS.
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker1-1/+1
2013-01-01Update years in copyright notice for the GDB files.Joel Brobecker1-2/+1
Two modifications: 1. The addition of 2013 to the copyright year range for every file; 2. The use of a single year range, instead of potentially multiple year ranges, as approved by the FSF.
2012-01-04Copyright year update in most files of the GDB Project.Joel Brobecker1-2/+2
gdb/ChangeLog: Copyright year update in most files of the GDB Project.
2011-01-01run copyright.sh for 2011.Joel Brobecker1-1/+1
2010-01-01Update copyright notices to add year 2010.Joel Brobecker1-1/+1
2009-01-14 Update the copyright notice of some of the files I missedJoel Brobecker1-1/+2
in the previous copyright update.
2008-01-01 Updated copyright notices for most files.Daniel Jacobowitz1-1/+1
2007-08-24 Switch the license of all files explicitly copyright the FSFJoel Brobecker1-5/+4
to GPLv3.
2007-01-09Copyright updates for 2007.Daniel Jacobowitz1-1/+1
2006-08-29 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips toThiemo Seufer1-0/+1
sim_igen_machine. * configure: Regenerate. * mips.igen (model): Add smartmips. (MADDU): Increment ACX if carry. (do_mult): Clear ACX. (ROR,RORV): Add smartmips. (include): Include smartmips.igen. * sim-main.h (ACX): Set to REGISTERS[89]. * smartmips.igen: New file.
2005-12-14* Makefile.in (SIM_OBJS): Add dsp.o.Chao-ying Fu1-1/+49
(dsp.o): New dependency. (IGEN_INCLUDE): Add dsp.igen. * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*, mipsisa64*-*-*): Add dsp to sim_igen_machine. * configure: Regenerate. * mips.igen: Add dsp model and include dsp.igen. (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2, because these instructions are extended in DSP ASE. * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of adding 6 DSP accumulator registers and 1 DSP control register. (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX, AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT, DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK, DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK, DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK, DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK, DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6, DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK, DSPCR_CCOND_SMASK): New define. (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators. * dsp.c, dsp.igen: New files for MIPS DSP ASE.
2004-05-122004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>Chris Demetriou1-1/+1
* mips/interp.c (decode_coproc): Sign-extend the address retrieved from COP0_BADVADDR. * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
2004-03-29 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)Richard Sandiford1-0/+12
(MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New. * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide separate implementations for mipsIV and mipsV. Use new macros to determine whether the restrictions apply.
2003-01-052003-01-04 Richard Sandiford <rsandifo@redhat.com>Chris Demetriou1-2/+8
Andrew Cagney <ac131313@redhat.com> Gavin Romig-Koch <gavin@redhat.com> Graydon Hoare <graydon@redhat.com> Aldy Hernandez <aldyh@redhat.com> Dave Brolley <brolley@redhat.com> Chris Demetriou <cgd@broadcom.com> * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1. (sim_mach_default): New variable. (mips64vr-*-*, mips64vrel-*-*): New configurations. Add a new simulator generator, MULTI. * configure: Regenerate. * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables. (multi-run.o): New dependency. (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables. (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules. (tmp-multi): Combine them. (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi. (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI. (distclean-extra): New rule. * sim-main.h: Include bfd.h. (MIPS_MACH): New macro. * mips.igen (vr4120, vr5400, vr5500): New models. (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500. * vr.igen: Replace with new version.
2002-12-312002-12-31 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-4/+0
* sim-main.h (check_branch_bug, mark_branch_bug): Remove. * mips.igen: Remove all invocations of check_branch_bug and mark_branch_bug.
2002-06-142002-06-14 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-0/+21
Ed Satterthwaite <ehs@broadcom.com> * mips3d.igen: New file which contains MIPS-3D ASE instructions. * Makefile.in (IGEN_INCLUDE): Add mips3d.igen. * mips.igen: Include mips3d.igen. (mips3d): New model name for MIPS-3D ASE instructions. (CVT.W.fmt): Don't use this instruction for word (source) format instructions. * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32) (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32) (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions. (NR_FRAC_GUARD, IMPLICIT_1): New macros. * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2) (RSquareRoot1, RSquareRoot2): New macros. (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1) (fp_rsqrt2): New functions. * configure.in: Add MIPS-3D support to mipsisa64 simulator. * configure: Regenerate.
2002-06-142002-06-13 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-0/+10
* cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros. (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac) (fp_inv_sqrt, fpu_format_name): Add paired-single support. (convert): Note that this function is not used for paired-single format conversions. (ps_lower, ps_upper, pack_ps, convert_ps): New functions. * mips.igen (FMT, MOVtf.fmt): Add paired-single support. (check_fmt_p): Enable paired-single support. (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS) (PUU.PS): New instructions. (CVT.S.fmt): Don't use this instruction for paired-single format destinations. * sim-main.h (FP_formats): New value 'fmt_ps.' (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes. (PSLower, PSUpper, PackPS, ConvertPS): New macros.
2002-06-082002-06-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-0/+14
Ed Satterthwaite <ehs@broadcom.com> * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt) (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions. * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd) (fp_nmsub): New prototypes. (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd) (NegMultiplySub): New defines. * mips.igen (RSQRT.fmt): Use RSquareRoot(). (MADD.D, MADD.S): Replace with... (MADD.fmt): New instruction. (MSUB.D, MSUB.S): Replace with... (MSUB.fmt): New instruction. (NMADD.D, NMADD.S): Replace with... (NMADD.fmt): New instruction. (NMSUB.D, MSUB.S): Replace with... (NMSUB.fmt): New instruction.
generated by cgit v1.1 at 2025-02-06 22:38:38 +0000