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2002-03-012002-02-28 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-4/+2
2002-02-282002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-1/+1
2002-02-282002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-2/+3
2002-02-282002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-0/+128
2002-02-272002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-156/+153
2002-02-272002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-1/+188
2002-02-192002-02-18 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-96/+377
2002-02-112002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-9/+25
2002-02-112002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-7/+6
2002-02-112002-02-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-48/+48
2002-02-112002-02-10 Chris Demetriou cgd@sibyte.comChris Demetriou1-6/+10
2001-04-12* mips.igen (CFC1, CTC1): Pass the correct register numbers toJim Blandy1-3/+3
2000-07-04Fix MOVN.fmt and MOVZ.fmt, need to test GPR[RT].Andrew Cagney1-14/+9
2000-06-23Fix printf arguments.Andrew Cagney1-3/+4
2000-05-29fix spelling mistake in commentNick Clifton1-1/+1
2000-05-01* mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.Andrew Cagney1-1/+2
2000-03-02* autoconf correctionFrank Ch. Eigler1-3/+19
1999-12-07import gdb-1999-12-06 snapshotJason Molenda1-0/+2
1999-10-26import gdb-1999-10-25 snapshotJason Molenda1-4/+3
1999-09-13import gdb-1999-09-13 snapshotJason Molenda1-2/+2
1999-09-09import gdb-1999-09-08 snapshotStan Shebs1-1/+2
1999-07-07import gdb-1999-07-07 pre reformatJason Molenda1-0/+18
1999-04-26import gdb-19990422 snapshotStan Shebs1-1/+9
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+3895
1999-04-16Initial creation of sourceware repositoryStan Shebs1-6517/+0
1998-12-30* eCos->devo merge; tx3904 sanitize tags removedFrank Ch. Eigler1-47/+95
1998-12-13for bfd:Gavin Romig-Koch1-6/+499
1998-12-12 * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR.Gavin Romig-Koch1-2/+2
1998-12-08* sky->devo merge, final part of sim mergeFrank Ch. Eigler1-4/+205
1998-11-23Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator.Andrew Cagney1-0/+3
1998-11-23Switch mips-lsi-elf mips16 simulator to igen (from gencode).Andrew Cagney1-432/+476
1998-06-29 * mips.igen (check_mf_hilo): Correct check.Gavin Romig-Koch1-104/+5
1998-06-18* Adapt to changed R5900 SQC2 opcode.Frank Ch. Eigler1-19/+46
1998-06-16* ECC (tx39) and sky changes.Frank Ch. Eigler1-13/+19
1998-06-16Fix unresolved external error for sky_cpcond0 on non-SKY builds.James Lemke1-0/+8
1998-06-15Implement CPCOND0 and insns BC0F/BC0FL/BC0T/BC0TL.James Lemke1-0/+32
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael1-0/+30
1998-06-09 * mips.igen (SWC1) : Correct the handling of ReverseEndianGavin Romig-Koch1-6/+6
1998-06-04The r5900 doesn't have HI/LO DIV/MUL register problems. HobbleAndrew Cagney1-27/+118
1998-05-21Fix sign extension on 32 bit add/sub instructions.Andrew Cagney1-18/+42
1998-05-18* Monster patch - may destablize MIPS sims for a little while.Frank Ch. Eigler1-0/+46
1998-05-13 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):Gavin Romig-Koch1-9/+49
1998-04-21Implement ERET instruction.Andrew Cagney1-0/+20
1998-04-21For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1-30/+96
1998-04-15Re-fix 32 bit DSRAV instruction.Andrew Cagney1-6/+15
1998-04-15Debug tx19 built from igen sources.Andrew Cagney1-10/+105
1998-04-14Implement 32 bit MIPS16 instructions listed in m16.igen.Andrew Cagney1-112/+297
1998-04-05* R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1-819/+193
1998-04-02For mips get_mem_size call. Force the return of a 32 bit valueAndrew Cagney1-43/+0
1998-04-01* You bop one on the head ... another one appears.Frank Ch. Eigler1-0/+4
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