| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2007-08-24 | Switch the license of all files explicitly copyright the FSF | Joel Brobecker | 1 | -7/+6 | |
| to GPLv3. | |||||
| 2003-05-02 | [igen/ChangeLog] | Chris Demetriou | 1 | -1/+2 | |
| 2003-05-03 Chris Demetriou <cgd@broadcom.com> * compare_igen_models: Tweak attribution slightly. [mips/ChangeLog] 2003-05-03 Chris Demetriou <cgd@broadcom.com> * cp1.c: Tweak attribution slightly. * cp1.h: Likewise. * mdmx.c: Likewise. * mdmx.igen: Likewise. * mips3d.igen: Likewise. * sb1.igen: Likewise. | |||||
| 2002-06-03 | 2002-06-03 Chris Demetriou <cgd@broadcom.com> | Chris Demetriou | 1 | -0/+42 | |
| Ed Satterthwaite <ehs@broadcom.com> * configure.in (mipsisa64sb1*-*-*): New target for supporting Broadcom SiByte SB-1 processor configurations. * configure: Regenerate. * sb1.igen: New file. * mips.igen: Include sb1.igen. (sb1): New model. * Makefile.in (IGEN_INCLUDE): Add sb1.igen. * mdmx.igen: Add "sb1" model to all appropriate functions and instructions. * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions. (ob_func, ob_acc): Reference the above. (qh_acc): Adjust to keep the same size as ob_acc. * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff) (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros. | |||||
| 2002-06-02 | 2002-06-02 Chris Demetriou <cgd@broadcom.com> | Chris Demetriou | 1 | -0/+550 | |
| Ed Satterthwaite <ehs@broadcom.com> * mips.igen (mdmx): New (pseudo-)model. * mdmx.c, mdmx.igen: New files. * Makefile.in (SIM_OBJS): Add mdmx.o. * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48): New typedefs. (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp) (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA) (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC) (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS) (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES) (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical) (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL) (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND) (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA) (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR) (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB) (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor) (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel) (qh_fmtsel): New macros. (_sim_cpu): New member "acc". (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op) (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions. | |||||
| 1999-04-16 | Initial creation of sourceware repository | Stan Shebs | 1 | -1367/+0 | |
| 1998-02-28 | Add generic sim-info.c:sim_info() function using module mechanism. | Andrew Cagney | 1 | -8/+9 | |
| Clean up compile probs in mips/vr5400. | |||||
| 1998-02-23 | sim-main.h: Re-arange r5900 registers so that they have their own | Andrew Cagney | 1 | -63/+131 | |
| little struct. interp.c: Update. Also add floating point Max/Min functions. mips.igen: Remove r5900 tag from any floating point instructions. r5900.igen: Rewrite. Implement *all* floating point insns (except ld/st). r5400.igen: Tag mdmx functions as being mdmx specific. | |||||
| 1998-02-01 | mips: Add multi-processor support for r5900. Others might work. | Andrew Cagney | 1 | -15/+14 | |
| common, igen: Fix MP related bugs. | |||||
| 1997-11-26 | Fix typo in format argument to sim_io_eprintf. | Andrew Cagney | 1 | -3/+3 | |
| 1997-11-26 | Move MDMX instructions which are public knowledge from vr5400.igen | Andrew Cagney | 1 | -0/+1299 | |
| into mdmx.igen (MDMX is MMX on steroids). Keep the file secret. | |||||
 |
index : riscv-gnu-toolchain/gdb.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |