Age | Commit message (Expand) | Author | Files | Lines |
1998-05-21 | * interp.c (sim_fetch_register): Convert internal r5900 regs to | Andrew Cagney | 1 | -1/+1 |
1998-05-18 | * Monster patch - may destablize MIPS sims for a little while. | Frank Ch. Eigler | 1 | -40/+179 |
1998-05-07 | * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.c | Patrick Macdonald | 1 | -0/+52 |
1998-05-07 | Initial Breakpoint support: | Ron Unrau | 1 | -2/+4 |
1998-04-21 | configure.in, interp.c: Add configure option --with-sim-funit. | James Lemke | 1 | -0/+20 |
1998-04-21 | Implement ERET instruction. | Andrew Cagney | 1 | -12/+37 |
1998-04-21 | For new IGEN simulators, rewrite checks validating correct use of the | Andrew Cagney | 1 | -18/+4 |
1998-04-17 | * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions. | Frank Ch. Eigler | 1 | -12/+14 |
1998-04-16 | * Adapted R5900 COP2 interface code to clarified micro-mode interlock | Frank Ch. Eigler | 1 | -4/+9 |
1998-04-15 | * Changes to make interp.c compile under mips64r5900-sky-elf target. | Frank Ch. Eigler | 1 | -2/+11 |
1998-04-15 | Debug tx19 built from igen sources. | Andrew Cagney | 1 | -24/+1 |
1998-04-13 | * Fixed a one-character typo in COP2 instruction synthesis. | Frank Ch. Eigler | 1 | -1/+1 |
1998-04-08 | * R5900 sky COP2 testing continuing. Today only small | Frank Ch. Eigler | 1 | -3/+7 |
1998-04-07 | * R5900 COP2 sim testing in progress. The majority of instructions actually | Frank Ch. Eigler | 1 | -2/+2 |
1998-04-07 | * R5900 COP2 is now ready for testing. Let loose the dogs! | Frank Ch. Eigler | 1 | -5/+31 |
1998-04-05 | * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF | Frank Ch. Eigler | 1 | -89/+125 |
1998-04-05 | aclocal.m4: Don't enable inlining when cross-compiling. | Andrew Cagney | 1 | -631/+149 |
1998-04-02 | Re-do load/store operations so that they work for both 32 and 64 bit | Andrew Cagney | 1 | -15/+16 |
1998-04-02 | For mips get_mem_size call. Force the return of a 32 bit value | Andrew Cagney | 1 | -2/+5 |
1998-04-01 | sky-vu.[ch]: prototype decls, cast floats to ints before register transfer | Ron Unrau | 1 | -51/+148 |
1998-03-31 | * sky-dma.c: Clarify text in warning msg. | James Lemke | 1 | -3/+27 |
1998-03-30 | * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide | Frank Ch. Eigler | 1 | -54/+95 |
1998-03-29 | * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton. | Frank Ch. Eigler | 1 | -0/+2 |
1998-03-27 | * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code | Frank Ch. Eigler | 1 | -9/+203 |
1998-03-27 | * sky-vu.c: new file to read/write VU registers | Ron Unrau | 1 | -16/+10 |
1998-03-27 | Define CPU_INDEX. Initialize. | Andrew Cagney | 1 | -23/+31 |
1998-03-06 | * Numerous changes & small bug fixes in PKE sim code and test suite. | Frank Ch. Eigler | 1 | -2/+11 |
1998-03-04 | * interp.c (sim_open): Map 4M of memory at zero for SKY sim only. | James Lemke | 1 | -0/+3 |
1998-03-04 | sim-main.h: track SKY register number changes from gdb | Ron Unrau | 1 | -35/+60 |
1998-02-28 | Add generic sim-info.c:sim_info() function using module mechanism. | Andrew Cagney | 1 | -37/+0 |
1998-02-28 | * interp.c (DECLARE_OPTION_HANDLER): Use it. | Doug Evans | 1 | -2/+6 |
1998-02-23 | Make it compile again for -DTARGET_SKY | Ron Unrau | 1 | -32/+33 |
1998-02-23 | sim-main.h: Re-arange r5900 registers so that they have their own | Andrew Cagney | 1 | -32/+235 |
1998-02-19 | * interp.c (load_memory): Add missing "break"'s. | Gavin Romig-Koch | 1 | -6/+12 |
1998-02-16 | configure: rerun autoconf | Ron Unrau | 1 | -0/+2 |
1998-02-15 | configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure. | Ron Unrau | 1 | -1/+87 |
1998-02-09 | * Add hardware_init hook. | Ian Carmichael | 1 | -0/+11 |
1998-02-03 | IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro, | Andrew Cagney | 1 | -15/+23 |
1998-02-02 | Add support for configuring the size of the floating point unit (fp_word). | Andrew Cagney | 1 | -8/+38 |
1998-02-02 | Rewrite the mipsI/II/III pending-slot code. | Andrew Cagney | 1 | -73/+70 |
1998-02-02 | Always compile FP code (test for FP at run-time). | Andrew Cagney | 1 | -129/+90 |
1998-02-01 | mips: Add multi-processor support for r5900. Others might work. | Andrew Cagney | 1 | -196/+233 |
1998-01-31 | igen: Fix SMP simulator generator support. | Andrew Cagney | 1 | -2/+3 |
1998-01-05 | * interp.c (sim_monitor): Handle Densan monitor outbyte | Mark Alexander | 1 | -0/+8 |
1997-12-29 | * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c). | Felix Lee | 1 | -284/+275 |
1997-11-20 | o Add SIM_SIGFPE to sim-signals | Andrew Cagney | 1 | -6/+6 |
1997-11-20 | Allow reads/writes to C0_CONFIG register. | Andrew Cagney | 1 | -12/+16 |
1997-11-11 | Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, | Andrew Cagney | 1 | -5/+4 |
1997-11-06 | Replace global IPC with function argument cia or current instruction | Andrew Cagney | 1 | -31/+34 |
1997-11-06 | IGEN likes to cache the current instruction address (CIA). Change the | Andrew Cagney | 1 | -40/+63 |