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path: root/sim/mips/interp.c
AgeCommit message (Expand)AuthorFilesLines
1998-05-21* interp.c (sim_fetch_register): Convert internal r5900 regs toAndrew Cagney1-1/+1
1998-05-18* Monster patch - may destablize MIPS sims for a little while.Frank Ch. Eigler1-40/+179
1998-05-07 * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.cPatrick Macdonald1-0/+52
1998-05-07Initial Breakpoint support:Ron Unrau1-2/+4
1998-04-21configure.in, interp.c: Add configure option --with-sim-funit.James Lemke1-0/+20
1998-04-21Implement ERET instruction.Andrew Cagney1-12/+37
1998-04-21For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1-18/+4
1998-04-17* Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions.Frank Ch. Eigler1-12/+14
1998-04-16* Adapted R5900 COP2 interface code to clarified micro-mode interlockFrank Ch. Eigler1-4/+9
1998-04-15* Changes to make interp.c compile under mips64r5900-sky-elf target.Frank Ch. Eigler1-2/+11
1998-04-15Debug tx19 built from igen sources.Andrew Cagney1-24/+1
1998-04-13* Fixed a one-character typo in COP2 instruction synthesis.Frank Ch. Eigler1-1/+1
1998-04-08* R5900 sky COP2 testing continuing. Today only smallFrank Ch. Eigler1-3/+7
1998-04-07* R5900 COP2 sim testing in progress. The majority of instructions actuallyFrank Ch. Eigler1-2/+2
1998-04-07* R5900 COP2 is now ready for testing. Let loose the dogs!Frank Ch. Eigler1-5/+31
1998-04-05* R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1-89/+125
1998-04-05aclocal.m4: Don't enable inlining when cross-compiling.Andrew Cagney1-631/+149
1998-04-02Re-do load/store operations so that they work for both 32 and 64 bitAndrew Cagney1-15/+16
1998-04-02For mips get_mem_size call. Force the return of a 32 bit valueAndrew Cagney1-2/+5
1998-04-01sky-vu.[ch]: prototype decls, cast floats to ints before register transferRon Unrau1-51/+148
1998-03-31 * sky-dma.c: Clarify text in warning msg.James Lemke1-3/+27
1998-03-30* Continuing sky R5900 / COP2 work. Added extra sanitize tags to hideFrank Ch. Eigler1-54/+95
1998-03-29* Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton.Frank Ch. Eigler1-0/+2
1998-03-27* Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] codeFrank Ch. Eigler1-9/+203
1998-03-27 * sky-vu.c: new file to read/write VU registersRon Unrau1-16/+10
1998-03-27Define CPU_INDEX. Initialize.Andrew Cagney1-23/+31
1998-03-06* Numerous changes & small bug fixes in PKE sim code and test suite.Frank Ch. Eigler1-2/+11
1998-03-04 * interp.c (sim_open): Map 4M of memory at zero for SKY sim only.James Lemke1-0/+3
1998-03-04sim-main.h: track SKY register number changes from gdbRon Unrau1-35/+60
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-37/+0
1998-02-28 * interp.c (DECLARE_OPTION_HANDLER): Use it.Doug Evans1-2/+6
1998-02-23Make it compile again for -DTARGET_SKYRon Unrau1-32/+33
1998-02-23sim-main.h: Re-arange r5900 registers so that they have their ownAndrew Cagney1-32/+235
1998-02-19 * interp.c (load_memory): Add missing "break"'s.Gavin Romig-Koch1-6/+12
1998-02-16configure: rerun autoconfRon Unrau1-0/+2
1998-02-15configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure.Ron Unrau1-1/+87
1998-02-09* Add hardware_init hook.Ian Carmichael1-0/+11
1998-02-03IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,Andrew Cagney1-15/+23
1998-02-02Add support for configuring the size of the floating point unit (fp_word).Andrew Cagney1-8/+38
1998-02-02Rewrite the mipsI/II/III pending-slot code.Andrew Cagney1-73/+70
1998-02-02Always compile FP code (test for FP at run-time).Andrew Cagney1-129/+90
1998-02-01mips: Add multi-processor support for r5900. Others might work.Andrew Cagney1-196/+233
1998-01-31igen: Fix SMP simulator generator support.Andrew Cagney1-2/+3
1998-01-05 * interp.c (sim_monitor): Handle Densan monitor outbyteMark Alexander1-0/+8
1997-12-29 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).Felix Lee1-284/+275
1997-11-20o Add SIM_SIGFPE to sim-signalsAndrew Cagney1-6/+6
1997-11-20Allow reads/writes to C0_CONFIG register.Andrew Cagney1-12/+16
1997-11-11Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,Andrew Cagney1-5/+4
1997-11-06Replace global IPC with function argument cia or current instructionAndrew Cagney1-31/+34
1997-11-06IGEN likes to cache the current instruction address (CIA). Change theAndrew Cagney1-40/+63