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AgeCommit message (Expand)AuthorFilesLines
1998-04-24* mips.igen (do_store_left): Pass 0 not NULL to store_memory.Andrew Cagney1-0/+4
1998-04-21Entry about changing sim_open missing from changelog.Andrew Cagney1-0/+2
1998-04-21Implement ERET instruction.Andrew Cagney1-0/+13
1998-04-21For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1-0/+48
1998-04-17* Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions.Frank Ch. Eigler1-0/+7
1998-04-16* Adapted R5900 COP2 interface code to clarified micro-mode interlockFrank Ch. Eigler1-0/+7
1998-04-16o CVT.S.W and CVT.W.S were reversedAndrew Cagney1-0/+18
1998-04-15TX19 uses igen by default.Andrew Cagney1-1/+8
1998-04-15* Changes to make interp.c compile under mips64r5900-sky-elf target.Frank Ch. Eigler1-0/+7
1998-04-15Re-fix 32 bit DSRAV instruction.Andrew Cagney1-0/+10
1998-04-15Debug tx19 built from igen sources.Andrew Cagney1-0/+26
1998-04-14Implement 32 bit MIPS16 instructions listed in m16.igen.Andrew Cagney1-3/+21
1998-04-13* Fixed a one-character typo in COP2 instruction synthesis.Frank Ch. Eigler1-0/+7
1998-04-09* Backed out week-old attempt at enabling quadword memory access onFrank Ch. Eigler1-0/+9
1998-04-09* Fixed up blank lines in file.Ian Carmichael1-9/+1
1998-04-08* R5900 sky COP2 testing continuing. Today only smallFrank Ch. Eigler1-0/+11
1998-04-07* R5900 COP2 sim testing in progress. The majority of instructions actuallyFrank Ch. Eigler1-0/+8
1998-04-07* R5900 COP2 is now ready for testing. Let loose the dogs!Frank Ch. Eigler1-0/+12
1998-04-05* R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1-0/+16
1998-04-05aclocal.m4: Don't enable inlining when cross-compiling.Andrew Cagney1-0/+18
1998-04-04Cleanup INLINE support for simulators using common framework.Andrew Cagney1-0/+26
1998-04-02For mips get_mem_size call. Force the return of a 32 bit valueAndrew Cagney1-1/+11
1998-04-01* You bop one on the head ... another one appears.Frank Ch. Eigler1-2/+8
1998-03-30* Continuing sky R5900 / COP2 work. Added extra sanitize tags to hideFrank Ch. Eigler1-3/+11
1998-03-30 * configure.in (mipstx39*-*-*): Use gencode simulator ratherGavin Romig-Koch1-0/+6
1998-03-29* Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton.Frank Ch. Eigler1-0/+8
1998-03-27* Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] codeFrank Ch. Eigler1-0/+25
1998-03-27Do top level sim-hw module for device tree.Andrew Cagney1-0/+4
1998-03-27Define CPU_INDEX. Initialize.Andrew Cagney1-0/+9
1998-03-25Re-do --enable-sim-hardware so that each simulator can specify the devicesAndrew Cagney1-0/+4
1998-03-24* interp.c (Max, Min): Comment out functions. Not yet used.Andrew Cagney1-0/+14
1998-03-18* Added --with-sim-gpu2=<path> option for linking SCEI's GPU2 library withFrank Ch. Eigler1-0/+22
1998-03-10 * vr4320.igen (clz,dclz) : Added.Gavin Romig-Koch1-0/+7
1998-03-05Fix opcode fields in SHFL.*Andrew Cagney1-0/+6
1998-03-03 * vr4320.igen: New file.Gavin Romig-Koch1-0/+11
1998-03-03Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't checkAndrew Cagney1-0/+20
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-0/+8
1998-02-28 * interp.c (DECLARE_OPTION_HANDLER): Use it.Doug Evans1-0/+6
1998-02-25Finish implementation of r5900 instructions.Andrew Cagney1-0/+21
1998-02-24Add tracing to r5900 p* instructions.Andrew Cagney1-0/+4
1998-02-23sim-main.h: Re-arange r5900 registers so that they have their ownAndrew Cagney1-0/+43
1998-02-19 * interp.c (load_memory): Add missing "break"'s.Gavin Romig-Koch1-0/+13
1998-02-07Fix double dependency for itable.[hc]. Was causing both the mips16 and theAndrew Cagney1-0/+4
1998-02-03IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,Andrew Cagney1-0/+41
1998-02-02Add support for configuring the size of the floating point unit (fp_word).Andrew Cagney1-0/+21
1998-02-02Rewrite the mipsI/II/III pending-slot code.Andrew Cagney1-0/+12
1998-02-02Always compile FP code (test for FP at run-time).Andrew Cagney1-0/+12
1998-02-01mips: Add multi-processor support for r5900. Others might work.Andrew Cagney1-0/+46
1998-01-31Add config support for the size of the target address and OF cell.Andrew Cagney1-0/+4
1998-01-31mips - for r5900 generate igen simulator.Andrew Cagney1-0/+5
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