Age | Commit message (Collapse) | Author | Files | Lines |
|
* Makefile.in: Use of @true confuses VPATH. Remove it.
* cpu.h: Regenerated.
* cpux.h: Regenerated.
* decode.c: Regenerated.
* decodex.c: Regenerated.
* model.c: Regenerated.
* modelx.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
* semx-switch.c: Regenerated.
|
|
* Patch was posted by bje@redhat.com.
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed.
(stamp-xmloop): s/-parallel/-parallel-write/.
(stamp-xcpu): Update FLAGS variable, option syntax changed.
* configure.in (sim_link_files,sim_link_links): Delete.
* configure: Rebuild.
* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
* decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
* mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
* sim-if.c (sim_open): m32r_cgen_cpu_open renamed from
m32r_cgen_opcode_open. Set disassembler.
(sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open.
* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
m32r-desc.h,m32r-opc.h,m32r-sim.h.
|
|
Plus s/sanitize-m32rx/sanitize-cygnus/
|
|
* cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
|
|
|
|
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
|
|
|
|
* cpu.h: Regenerate.
* cpux.h: Regenerate.
|
|
* cpux.h: Regenerate.
|
|
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
|
|
(SIM_AC_OPTION_ALIGNMENT): Make strict.
* configure: Regenerate.
* sem-switch.c,sem.c,semx-switch.c: Regenerate.
* sim-main.h (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Define.
* traps.c (m32r_core_signal): Handle --environment=operating.
|
|
* cpux.h,decodex.c,semx-switch.c: Regenerate.
|
|
|
|
* configure: Regenerate.
* sim-main.h: Protect against multiple inclusion.
Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
Done by cgen-sim.h now.
* tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
* cpuall.h: Regenerate.
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract16): Make static inline again.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(extract32): Ditto.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(execute): Test ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
* mloopx.in: Rewrite.
|
|
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
|
|
(extract.o): Delete.
(stamp-arch): Depend on $(CGEN_ARCH_SCM).
(stamp-cpu): Don't build extract.c.
* cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild.
* mloop.in (extract16): Update type of `insn' arg.
Delete call to d->extract.
(extract32): Ditto.
* Makefile.in (M32RX_OBJS): Delete extractx.o.
(extractx.o): Delete.
(stamp-xcpu): Don't build extractx.c.
* cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild.
* mloopx.in (extractx16): Update type of `insn' arg.
Delete call to d->extract. Delete arg pbb_p. All callers updated.
(extract-simple,full-exec-simple,fast-exec-simple): Delete.
(extractx32): Ditto.
|
|
before cgen-types.h.
* tconfig.in: Guard against multiple inclusion.
* cpu.h: Delete decls moved to genmloop.sh.
* cpux.h: Ditto.
|
|
Bring over from branch.
|
|
* arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate
to get #include cleanup.
* decodex.c,extractx.c,modelx.c: Ditto.
|
|
CGEN_INCLUDE_DEPS.
(M32RBF_INCLUDE_DEPS): Define.
(m32r .o's): Depend on it.
(mloop.c): Update call to genmloop.sh.
* cpu.h,cpuall.h: Regenerate.
* sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h.
#include cgen-scache.h,cgen-cpu.h.
* tconfig.in (WITH_FOO semantic macros): Delete.
* Makefile.in (M32RXF_INCLUDE_DEPS): Define.
(m32rx .o's): Depend on it.
(mloopx.c): Update call to genmloop.sh.
* cpux.h: Regenerate.
|
|
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
(mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
(stamp-decode): Delete, build decode files with other cpu files.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
load_regs_pending.
* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
m32rbf_h_accum_set): Likewise.
(m32r_model_{init,update}_insn_cycles): Delete.
(m32rbf_model_insn_{before,after}): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): Delete.
(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
(m32rbf_model_test_u_exec): New fn.
* mloop.in: Rewrite, use pbb support.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
(sim_fetch_register,sim_store_register): Delete.
* sim-main.h (CIA_GET,CIA_SET): Fix.
(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
* tconfig.in (WITH_SCACHE_PBB): Define.
(WITH_SCACHE_PBB_M32RBF): Define.
* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
(m32r_trap): Pass pc to sim_engine_halt.
* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
* configure: Regenerate.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
(mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu.
(semx.o): Delete.
(extractx.o): Add.
(stamp-xdecode): Delete, build decode files with other cpu files.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
* readx.c: Delete.
* semx.c: Delete.
* extractx.c: New file.
* semx-switch.c: New file.
* m32r-sim.h (BRANCH_NEW_PC): Delete.
(SEM_SKIP_INSN): New macro.
* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
(m32rxf_model_insn_{before,after}): New fns.
(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
* mloopx.in: Rewrite, use pbb support.
* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx
|
|
(UART params): Update to msa2000.
* devices.c (device_io_read_buffer): Update to msa2000.
* m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw.
(m32rb_h_psw_get,m32rb_h_psw_set): New functions.
* arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate.
* m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw.
(m32rx_h_psw_get,m32rx_h_psw_set): New functions.
* cpux.c,cpux.h,readx.c,semx.c: Regenerate.
PR 15938.
|
|
* traps.c (m32r_trap): New arg `pc'.
* sem.c,sem-switch.c: Regenerated.
* cpux.h,readx.c,semx.c: Regenerated.
|
|
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
|
|
* sim-if.c (sim_open): Open opcode table.
(sim_close): Close it.
|
|
accept an accumulator choice.
* cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
|
|
* traps.c (m32r_trap): Tweak for -Wall.
* m32rx.c: Include cgen-mem.h.
* semx.c: Regenerate, get -Wall cleanups.
|
|
* cpux.h,readx.c,semx.c: Ditto.
|
|
* configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
* configure: Regenerate.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate.
* semx.c: Regenerate.
* mloopx.in (icount): Moved here from genmloop.sh.
|
|
load_stall,biggest_cycles.
* m32r.c (m32r_model_mark_get_h_gr): Update.
(m32r_model_init_insn_cycles,m32r_model_update_insn_cycles): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): New functions.
* mloop.in: Call cycle init/update fns.
* model.c: Regenerate.
* m32rx.c (m32rx_model_mark_get_h_gr): Update.
* mloopx.in: Call cycle init/update fns.
* modelx.c: Regenerate.
|
|
to recursive makes.
(stamp-{xcpu,xdecode}): Ditto.
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add traps.o
* sim-if.c: Don't include targ-vals.h.
(sim_engine_illegal_insn): Moved to traps.c
* sim-main.h (SIM_CORE_SIGNAL): Define.
(m32r_core_signal): Declare.
* devices.c (device_io_read_buffer): Handle cache purging via MCCR
register.
* m32r-sim.h (M32R_MISC_PROFILE): Move here from sim-main.h.
(PROFILE_COUNT_SHORTINSNS,PROFILE_COUNT_LONGINSNS): New macros.
(TRAP_SYSCALL,TRAP_BREAKPOINT): New macros.
|
|
|
|
* mloopx.in (extract): Set abuf.addr for proper fill nop counting.
(execute): Count parallel insns.
* sim-if.c (print_m32r_misc_cpu): Print count.
* sim-main.h (M32R_MISC_PROFILE): New member parallel_count.
|