Age | Commit message (Collapse) | Author | Files | Lines |
|
|
|
|
|
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpu2.c: Regenerate.
* cpu2.h: Regenerate.
* cpuall.h: Regenerate.
* cpux.c: Regenerate.
* cpux.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* decode2.c: Regenerate.
* decode2.h: Regenerate.
* decodex.c: Regenerate.
* decodex.h: Regenerate.
* model.c: Regenerate.
* model2.c: Regenerate.
* modelx.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
* sem2-switch.c: Regenerate.
* semx-switch.c: Regenerate.
|
|
to GPLv3.
|
|
|
|
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
|
|
* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* cpux.c: Regenerate.
* cpux.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* decodex.c: Regenerate.
* decodex.h: Regenerate.
* model.c: Regenerate.
* modelx.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
* semx-switch.c: Regenerate.
|
|
arch.c: Regenerate.
arch.h: Regenerate.
cpu.c: Regenerate.
cpu.h: Regenerate.
cpuall.h: Regenerate.
cpux.c: Regenerate.
cpux.h: Regenerate.
decode.c: Regenerate.
decode.h: Regenerate.
decodex.c: Regenerate.
decodex.h: Regenerate.
model.c: Regenerate.
modelx.c: Regenerate.
sem-switch.c: Regenerate.
sem.c: Regenerate.
semx-switch.c: Regenerate.
|
|
* Makefile.in: Use of @true confuses VPATH. Remove it.
* cpu.h: Regenerated.
* cpux.h: Regenerated.
* decode.c: Regenerated.
* decodex.c: Regenerated.
* model.c: Regenerated.
* modelx.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
* semx-switch.c: Regenerated.
|
|
|
|
|
|
* cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
|
|
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
|
|
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
|
|
and variable renaming due to macro insn additions.
* mloop.in: Update to use CGEN_INSN_NUM.
* cpu.x,modelx.c,readx.c,semx.c: Regenerated.
* mloopx.in: Update to use CGEN_INSN_NUM.
|
|
* cpux.c, decodex.c, decodex.h, readx.c, semx.c, modelx.c: Regenerate.
|