riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2006-03-14	* mem.c (mem_put_byte): Hook simulated UART to stdout.	DJ Delorie	6	-12/+111
	(mem_put_hi): Hook in simulated trace port. (mem_get_byte): Hook in simulated uart control port. * opc2c: Be more picky about matching special comments. * r8c.opc (shift_op): Limit shift counts to -16..16. (BMcnd): Map conditional codes. * reg.c (condition_true): Mask condition code to 4 bits. * syscalls.c: Include local syscall.h. * syscall.h: New, copied from libgloss.
2006-01-23	sim/ChangeLog:	Jim Blandy	32	-0/+17327
	2005-10-06 Jim Blandy <jimb@redhat.com> Add simulator for Renesas M32C and M16C. * m32c: New directory. * configure.ac: Add entry for Renesas M32C. * configure: Regenerate. sim/m32c/ChangeLog: 2005-10-06 Jim Blandy <jimb@redhat.com> Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>, with further work from Jim Blandy <jimb@redhat.com> and Kevin Buettner <kevinb@redhat.com>. * ChangeLog: New. * Makefile.in: New. * blinky.S: New. * config.in: New. * configure: New. * configure.in: New. * cpu.h: New. * gdb-if.c: New. * gloss.S: New. * int.c: New. * int.h: New. * load.c: New. * load.h: New. * m32c.opc: New. * main.c: New. * mem.c: New. * mem.h: New. * misc.c: New. * misc.h: New. * opc2c.c: New. * r8c.opc: New. * reg.c: New. * safe-fgets.c: New. * safe-fgets.h: New. * sample.S: New. * sample.ld: New. * sample2.c: New. * srcdest.c: New. * syscalls.c: New. * syscalls.h: New. * trace.c: New. * trace.h: New.