aboutsummaryrefslogtreecommitdiff
path: root/sim/iq2000
AgeCommit message (Expand)AuthorFilesLines
2016-01-10sim: allow the inline configure option everywhereMike Frysinger3-51/+41
2016-01-10sim: drop --enable-sim-{regparm,stdcall} optionsMike Frysinger2-12/+6
2016-01-10sim: drop --enable-sim-cflags optionMike Frysinger2-23/+6
2016-01-09sim: drop common/cconfig.h in favor of a single config.hMike Frysinger3-3/+406
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2-3/+8
2016-01-04sim: punt x86-specific bswap logicMike Frysinger2-21/+6
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger2-3/+5
2016-01-03sim: clean up some more device detritusMike Frysinger4-36/+7
2016-01-03sim: drop host endian configure optionMike Frysinger3-261/+232
2016-01-03sim: convert to bfd_endianMike Frysinger4-21/+25
2016-01-02sim: iq2000/m32r/lm32/sh64: delete dead option codeMike Frysinger2-8/+4
2016-01-02sim: delete dead current_state globalsMike Frysinger2-8/+5
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker15-15/+15
2015-12-27sim: unify sim-hloadMike Frysinger2-1/+4
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger3-6/+6
2015-12-26sim: standardize sim_create_inferior handling of argv a bit moreMike Frysinger2-4/+13
2015-12-25sim: sim-model: build for everyoneMike Frysinger3-8/+5
2015-12-25sim: move MACH/MODEL types into SIM_xxx namespaceMike Frysinger4-5/+12
2015-12-25sim: move WITH_SCACHE_PBB to sim-main.hMike Frysinger3-5/+10
2015-12-24sim: make LMA loading the default for all targetsMike Frysinger2-3/+4
2015-12-24sim: delete old breakpoint codeMike Frysinger2-9/+5
2015-12-24sim: enable watchpoint module everywhereMike Frysinger2-5/+4
2015-12-24sim: delete SIM_HAVE_MEM_SIZEMike Frysinger2-7/+4
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger2-2/+6
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger2-9/+4
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-3/+3
2015-06-23sim: use AS_HELP_STRING everywhereMike Frysinger2-16/+33
2015-06-12sim: update configure.in->configure.ac docsMike Frysinger2-1/+5
2015-06-12sim: drop -DTRACE from configureMike Frysinger2-3/+7
2015-06-12sim: cgen: namespace custom trace functionsMike Frysinger5-208/+216
2015-04-18sim: trim old USING_SIM_BASE_H defineMike Frysinger2-2/+4
2015-04-18sim: unify SIM_CPU definitionMike Frysinger2-3/+4
2015-04-18sim: unify sim_cia definitionMike Frysinger2-3/+4
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger2-3/+4
2015-04-15sim: unify sim-cpu usageMike Frysinger3-6/+5
2015-04-15sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu stateMike Frysinger2-2/+11
2015-04-13sim: fix the PKGVERSION defineMike Frysinger2-2/+6
2015-04-06sim: move sim-engine.o/sim-hrw.o to the common listMike Frysinger2-2/+5
2015-04-02Regenerate configure in simH.J. Lu1-2/+2
2015-04-01Regenerate configure in simH.J. Lu1-4/+6
2015-04-01sim: update zlib handlingMike Frysinger3-84/+17
2015-03-24sim: Revert "Fix frv/iq2000/m32r/sh64 sim, default hardware to off."Mike Frysinger3-2/+6
2015-03-24sim: fix sim-hardware configure optionMike Frysinger2-6/+6
2015-03-23sim: drop support for requiring hw supportMike Frysinger2-10/+9
2015-03-23sim: iq2000/mn10300: drop dv-sockser.o referencesMike Frysinger2-5/+6
2015-03-23sim: dv-sockser: move build to common dirMike Frysinger2-6/+10
2015-03-16sim: rename tconfig.in to tconfig.hMike Frysinger5-21/+22
2015-03-15sim: dv-sockser: push module init prototype downMike Frysinger2-6/+4
2015-03-14sim: make nrun the default run programMike Frysinger2-1/+4
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker15-15/+15
generated by cgit v1.1 at 2024-11-24 03:54:49 +0000