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2002-05-01[ common/ChangeLog ]Chris Demetriou2-4/+8
2002-03-24* gen.c (format_name_cmp): New function.Andrew Cagney2-1/+31
2002-03-082002-03-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-0/+15
2000-05-29Use GPR_CLEAR instead of GPR_SETNick Clifton2-1/+6
2000-05-24Change profiling so that it is enabled by default. Re-generate everything.Andrew Cagney2-39/+54
1999-09-09import gdb-1999-09-08 snapshotStan Shebs3-53/+73
1999-05-11import gdb-1999-05-10Stan Shebs2-58/+79
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs40-0/+17322
1999-04-16Initial creation of sourceware repositoryStan Shebs41-16036/+0
1998-12-04* gen-engine.c (print_run_body): Prefix instruction_address.Andrew Cagney1-2/+18
1998-07-29Fix incorrect calculation of conditional field when being extractedAndrew Cagney2-1/+15
1998-07-28Add note about limitations of insn_field_cmp().Andrew Cagney1-3/+6
1998-07-28Problems with conditional instruction-table fields (N!M, N=M, ...).Andrew Cagney2-67/+185
1998-04-26 * configure: Regenerated to track ../common/aclocal.m4 changes.Tom Tromey3-0/+17
1998-04-24 * configure: Regenerated to track ../common/aclocal.m4 changes.Tom Tromey3-32/+81
1998-04-24* ld-insn.c (load_insn_table): Terminate error with NL.Andrew Cagney1-0/+12
1998-04-22Regenerate configureMichael Meissner2-0/+1690
1998-04-21* gen-icache.c (print_icache_extraction): When generating #defineAndrew Cagney2-0/+868
1998-04-14Broke parsing of !<val>!<val> when adding support for =<field>. Fix.Andrew Cagney3-13/+43
1998-04-14Add support for instruction word conditionals of the form `XXX!YYY'Andrew Cagney5-79/+428
1998-04-04Cleanup INLINE support for simulators using common framework.Andrew Cagney3-97/+170
1998-04-03Don't bother generating trace prefix string when not tracing.Andrew Cagney2-99/+102
1998-03-24* gen-engine.c (print_run_body): Re-extract the CIA afterAndrew Cagney1-0/+5
1998-03-24 * Makefile.in: Get SHELL from configure.Stu Grossman1-0/+16
1998-02-23Generate ENGINE_ISSUE hooks as part of SMP simulator.Andrew Cagney1-0/+5
1998-02-23 * ld-insn.c (parse_function_record): When -Wnodiscard, suppressAndrew Cagney3-77/+255
1998-01-31mips - for r5900 generate igen simulator.Andrew Cagney2-3/+12
1998-01-31igen: Fix SMP simulator generator support.Andrew Cagney4-34/+931
1998-01-21Use macro GPR_SET(N,VAL) to clear zero registers.Andrew Cagney1-0/+47
1997-11-04 * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead ofBrendan Kehoe1-0/+5
1997-11-04do not assume NULL is an integer constantMichael Meissner1-0/+5
1997-10-29common/sim-bits.h: Document ROTn macro.Andrew Cagney1-0/+4
1997-10-28Add support for 16 byte quantities to sim-endian macro H2T.Andrew Cagney2-27/+78
1997-10-27Add include-file support to igen.Andrew Cagney5-417/+1348
1997-10-16* gen-semantics.c (print_semantic_body): Use CIA not cia.ip. EscapeAndrew Cagney1-0/+6
1997-10-14Output line-ref to original igen source file when generating traceAndrew Cagney3-15/+54
1997-10-09Add -Wnodiscard option so that warning about discarded instructionsAndrew Cagney4-928/+1555
1997-09-23 * configure.in: i386-windows is a cross, so don't expectFelix Lee1-1/+1
1997-09-19Correctly locate `_' in generated names.Andrew Cagney1-1/+1
1997-09-19Change semantic function name to semantic_<INSN>_<FMT> instead ofAndrew Cagney2-3/+8
1997-09-16Differentiate between a non-zero string and a constant zero field.Andrew Cagney1-0/+5
1997-09-15 * igen.c (gen_run_c): Handle non-multi-sim case.Andrew Cagney2-22/+36
1997-09-15Update to reflect change to sim/common/aclocal.m4 (allow sim/commonAndrew Cagney2-1/+6
1997-09-12Generate instruction profile call with each instruction.Andrew Cagney1-0/+6
1997-09-10(gen_itable_h): Output an enum defining the max size of the itableAndrew Cagney1-0/+7
1997-09-08Add multi-sim support to simulator.Andrew Cagney6-799/+3243
1997-09-01Passify cross compilation and GCC -WallAndrew Cagney3-4/+25
1997-06-06Clean up formatting of instruction traces.Andrew Cagney1-0/+33
1997-05-29Add a simple dissasembler to igenAndrew Cagney4-38/+740
1997-05-27Extend xor-endian and per-cpu support in core module.Andrew Cagney2-0/+148
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