| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 1997-09-08 | Add multi-sim support to simulator. | Andrew Cagney | 1 | -227/+287 |
| 1997-05-23 | Preliminary suport for xor-endian suport in core module. | Andrew Cagney | 1 | -1/+1 |
| 1997-05-23 | Incorrect test for zero-r0 code gen. | Andrew Cagney | 1 | -2/+2 |
| 1997-05-16 | o Make tic80 insn file more `cache ready' | Andrew Cagney | 1 | -0/+9 |
| 1997-05-05 | Fix problems -Wall found | Michael Meissner | 1 | -4/+9 |
| 1997-04-22 | TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a. | Andrew Cagney | 1 | -0/+303 |
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