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2021-05-28sim: h8300 Fixed different behavior in preinc/predec.Yoshinori Sato1-1/+3
* sim-main.h (h8_typecodes): Add operand type OP_REG_DEC, OP_REG_INC. * compile.c (decode): Rewrite oprand type for specific case. (fetch_1): Add handling OP_REG_DEC and OP_REG_INC. (step_once): Fix operand fetch order.
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger1-2/+0
Now that all ports have migrated to the new framework, drop support for the old sim_state_base layout.
2021-05-17sim: h8300: invert sim_state storageMike Frysinger1-4/+4
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-1/+0
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise.
2021-01-13sim: h8300: drop separate eightbit memory bufferMike Frysinger1-1/+0
The h8300 sim has its own implementation for memory handling that I'd like to replace with the common sim memory code. However, it's got a weird bit of code it calls "eightbit mem" that makes this not as easy as it would otherwise be. The code has this comment: /* These define the size of main memory for the simulator. Note the size of main memory for the H8/300H is only 256k. Keeping it small makes the simulator run much faster and consume less memory. The linker knows about the limited size of the simulator's main memory on the H8/300H (via the h8300h.sc linker script). So if you change H8300H_MSIZE, be sure to fix the linker script too. Also note that there's a separate "eightbit" area aside from main memory. For simplicity, the simulator assumes any data memory reference outside of main memory refers to the eightbit area (in theory, this can only happen when simulating H8/300H programs). We make no attempt to catch overlapping addresses, wrapped addresses, etc etc. */ I've read the H8/300 Programming Manual and the H8/300H Software Manual and can't find documentation on it. The closest I can find is the bits about the exception vectors, but that sounds like a convention where the first 256 bytes of memory are used for a special purpose. The sim will actually allocate a sep memory buffer of 256 bytes and you address it by accessing anywhere outside of main memory. e.g. I would expect code to access it like: uint32_t *data = (void *)0; data[0] = reset_exception_vector; not like the sim expects like: uint8_t *data = (void *)0x1000000; data[0] = ...; The gcc manual has an "eightbit_data" attribute: Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified variable should be placed into the eight-bit data section. The compiler generates more efficient code for certain operations on data in the eight-bit data area. Note the eight-bit data area is limited to 256 bytes of data. And the gcc code implies that it's accessed via special addressing: eightbit_data: This variable lives in the 8-bit data area and can be referenced with 8-bit absolute memory addresses. I'm fairly certain these are referring to the 8-bit addressing modes that allow access to 0xff00 - 0xffff with only an 8-bit immediate. They aren't completely separate address spaces which this eightbit memory buffer occupies. But the sim doesn't access its eightbit memory based on specific insns, it does it purely on the addresses requested. Unfortunately, much of this code was authored by Michael Snyder, so I can't ask him :(. I asked Renesas support and they didn't know: https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory So I've come to the conclusion that this was a little sim-specific hack done for <some convenience> and has no relation to real hardware. And as such, let's drop it until someone notices and can provide a reason for why we need to support it.
2021-01-07sim: h8300: delete opcode cachingMike Frysinger1-5/+0
This is in preparation for converting h8300 over to the common memory framework. It's not clear how much of a speed gain this was providing in the first place -- a naive test of ~400k insns (using shlr.s) shows that this code actually slowed things down a bit. If anyone really cares about h8300 anymore, they can migrate to the common insn caching logic.
2015-04-18sim: unify SIM_CPU definitionMike Frysinger1-3/+0
Since every target typedefs this the same way, move it to the common code. We have to leave Blackfin behind here for now because of inter-dependencies on types and headers: sim-base.h includes sim-model.h which needs types in machs.h which needs types in bfim-sim.h which needs SIM_CPU.
2015-04-18sim: unify sim_cia definitionMike Frysinger1-3/+0
Almost every target defines sim_cia the same way -- either using the address_word type directly, or a type of equivalent size. The only odd one out is sh64 (who has 32bit address_word and 64bit cia), and even that case doesn't seem to make sense. We'll put off clean up though of sh64 and at least set up a sensible default for everyone.
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger1-2/+0
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET} except the latter adds a layer of indirection via the sim state. This lets models set up different functions at runtime and doesn't reach so directly into the arch-specific cpu state. It also doesn't make sense to have two sets of macros that do exactly the same thing, so lets standardize on the one that gets us more.
2015-04-17sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpersMike Frysinger1-0/+2
This makes the common sim-cpu logic work.
2015-04-15sim: unify sim-cpu usageMike Frysinger1-5/+0
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the cpu state is multicore, and the STATE_CPU defines match, we can move it all to the common code.
2015-04-15sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu stateMike Frysinger1-2/+6
This sets up the sim_state structure and the cpu member to match what we do in most other sims, and what the common code suggests. This is a step to unifying on the sim-cpu.o object.
2012-05-19 PR 14072Nick Clifton1-0/+1
* wrapper.c: Include config.h before system header files. * callback.c: Include config.h before system header files. * cgen-trace.c: Likewise. * cgen-utils.c: Likewise. * gentmap.c: Likewise. * sim-if.c: Include config.h before system header files. * compile.c: Include config.h before system header files. * sim-main.h: Likewise. * gdb-if.c: Include config.h before system header files. * load.c: Likewise. * syscalls.c: Likewise. * trace.c: Likewise. * interp.c: Include config.h before system header files.
2003-12-162003-12-16 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
Patch submitted by Anil Paranjape <AnilP1@KPITCummins.com> * sim-main.h (H8300H_MSIZE): Increase from 18 bits to 24 bits.
2003-07-022003-06-24 Michael Snyder <msnyder@redhat.com>Michael Snyder1-2/+4
* sim-main.h (SIM_WIFSTOPPED, SIM_WSTOPSIG): Define. * compile.c (sim_resume): Use the above to return stop signal.
2003-06-192003-06-18 Corinna Vinschen <vinschen@redhat.com>Michael Snyder1-4/+4
* sim-main.h (enum h8_regnum): Turn around order of MACH, MACL and SBR, VBR (for benefit of gdb).
2003-06-032003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder1-0/+170
* h8300/compile.c: Add h8300sx insns and addressing modes. * h8300/sim-main.h: Replaces h8300/inst.h. * h8300/Makefile.in: Tweak to bring in some sim/common stuff.