riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-01-01	update copyright year range in GDB files	Joel Brobecker	1	-1/+1
2016-01-06	sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly	Mike Frysinger	1	-3/+3
2016-01-03	sim: parse_args: display getopt error ourselves	Mike Frysinger	1	-3/+1
2016-01-01	GDB copyright headers update after running GDB's copyright.py script.	Joel Brobecker	1	-1/+1
2015-12-26	sim: standardize sim_create_inferior handling of argv a bit more	Mike Frysinger	1	-1/+5
2015-11-15	sim: sim-close: unify sim_close logic	Mike Frysinger	1	-6/+0
2015-09-29	sim: ft32: correct simulation of MEMCPY and MEMSET	James Bowman	1	-2/+2
2015-09-29	sim: ft32: correctly simulate PM write port	James Bowman	1	-2/+6
2015-09-22	sim: ft32: add character input port	James Bowman	1	-0/+2
2015-04-17	sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}	Mike Frysinger	1	-3/+3
2015-04-13	sim: ft32: fix ft32_pc_get logic	Mike Frysinger	1	-1/+1
2015-04-12	sim: ft32: delete sim_read/sim_write funcs	Mike Frysinger	1	-22/+0
2015-03-28	sim: ft32: new port	James Bowman	1	-0/+913