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AgeCommit message (Expand)AuthorFilesLines
2021-06-30sim: cris/frv/iq2000/lm32: merge with common configure scriptMike Frysinger5-2944/+41
2021-06-30sim: unify scache settingsMike Frysinger4-29/+7
2021-06-30sim: frv: scope the unique configure flagMike Frysinger4-29/+41
2021-06-30sim: move default model to the runtime sim stateMike Frysinger5-24/+9
2021-06-30sim: namespace sim_machsMike Frysinger3-1/+11
2021-06-29sim: model: constify sim_machs storageMike Frysinger2-1/+5
2021-06-28sim: cgen: delete unused record_trace_results functionsMike Frysinger2-8/+4
2021-06-27sim: frv: add missing const typeMike Frysinger2-1/+5
2021-06-27sim: frv: fix engine hookMike Frysinger2-1/+5
2021-06-27sim: frv: fix up various missing prototype warningsMike Frysinger6-1/+22
2021-06-27sim: frv: fix some printf type mismatch warningsMike Frysinger3-2/+7
2021-06-27sim: frv: fix uninitialized variable warningMike Frysinger2-2/+6
2021-06-27sim: frv: fix return type for post_wait_for funcsMike Frysinger3-19/+31
2021-06-27sim: frv: fix ambiguous else compiler warningsMike Frysinger4-25/+43
2021-06-22sim: drop configure scripts for simple portsMike Frysinger2-0/+11
2021-06-21sim: unify hardware settingsMike Frysinger3-49/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-37/+29
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger4-5/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger3-124/+5
2021-06-20sim: unify cgen maintainer settingsMike Frysinger5-45/+6
2021-06-20sim: move sim-inline to the common codeMike Frysinger3-36/+5
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-85/+0
2021-06-19sim: unify toolchain dependency logicMike Frysinger2-1109/+1
2021-06-19sim: unify toolchain probing logicMike Frysinger2-1360/+26
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger3-7691/+6
2021-06-19sim: unify various library testing logicMike Frysinger2-141/+6
2021-06-18sim: unify -Werror build settingsMike Frysinger3-112/+6
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger4-59/+69
2021-06-18sim: split sim-signal.h include outMike Frysinger3-0/+7
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger5-56/+9
2021-06-17sim: split sim/callback.h include outMike Frysinger2-0/+5
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger2-2/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger3-280/+47
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger3-8/+5
2021-06-12sim: overhaul alignment settings managementMike Frysinger5-56/+12
2021-06-12sim: unify bug & package settingsMike Frysinger3-87/+2
2021-06-12sim: unify debug/stdio/trace/profile build settingsMike Frysinger2-150/+2
2021-06-12sim: unify environment build settingsMike Frysinger3-32/+2
2021-06-12sim: unify assert build settingsMike Frysinger4-28/+6
2021-06-12sim: unify platform function & header testsMike Frysinger3-552/+6
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger2-4/+4
2021-05-29sim: frv: fix up a bunch of prototype warningsMike Frysinger7-6/+41
2021-05-29sim: frv: fix compiler parentheses suggestions warningsMike Frysinger4-25/+39
2021-05-17sim: cgen: invert sim_state storage for cgen portsMike Frysinger2-10/+4
2021-05-16sim: switch config.h usage to defs.hMike Frysinger17-14/+57
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger3-2/+19
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger2-2/+14
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger3-2/+12
2021-04-26sim: nltvals: unify common syscall tablesMike Frysinger2-3/+4
2021-04-26sim: enable hardware support by defaultMike Frysinger3-3/+5
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