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2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
2015-05-17sim: erc32: restore attributionMike Frysinger1-1/+4
2015-05-08Switch erc32 simulator copyright headers to FSF.Joel Brobecker1-20/+14
2015-04-19sim/erc32: Switched emulated memory to host endian order.Jiri Gaisler1-41/+28
2015-03-28sim/erc32: Fix a few compiler warningsJiri Gaisler1-8/+8
2015-03-28sim: erc32: strip paren from return statementsMike Frysinger1-14/+14
2015-03-17sim/erc32: Removed type mismatch compiler warningsJiri Gaisler1-9/+14
2015-03-17sim/erc32: Added -v command line switch for verbose outputJiri Gaisler1-2/+3
2015-03-16sim/erc32: use SIM_AC_OPTION_HOSTENDIAN to probe for host endianessJiri Gaisler1-2/+1
2015-02-21sim/erc32: Fix incorrect simulator performance reportJiri Gaisler1-9/+24
2015-02-21sim/erc32: Perform pseudo-init if binary linked to non-zero address.Jiri Gaisler1-0/+2
2015-02-21sim/erc32: Disassembly in stand-alone mode did not work.Jiri Gaisler1-3/+14
2014-01-07remove PARAMS from simTom Tromey1-10/+10
2012-12-19[sim] Update old contact info in GPL license noticesJoel Brobecker1-2/+1
2012-12-19Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.Joel Brobecker1-1/+1
2012-08-16 * end.c: Include config.h before system header files.Nick Clifton1-0/+1
2010-05-112010-04-20 Tiemen Schut <T.Schut@sron.nl>Joel Sherrill1-10/+12
2005-07-08 * func.c: Remove ANSI_PROTOTYPES conditional code.Ben Elliston1-4/+0
2005-03-072005-03-07 Jerome Guitton <guitton@gnat.com>Jerome Guitton1-43/+0
2000-03-03* build patchFrank Ch. Eigler1-1/+1
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+1162
1999-04-16Initial creation of sourceware repositoryStan Shebs1-1139/+0
1998-06-02 * interf.c (sim_open): Use revamped memory_read, which makesMark Alexander1-122/+293
1996-05-20 New sparc simulator from the ESA.Rob Savoye1-0/+968