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path: root/sim/d10v/d10v_sim.h
AgeCommit message (Expand)AuthorFilesLines
2000-02-09Report SIGBUS and halt simulation when ld/st detect a misaligned address.Andrew Cagney1-0/+1
2000-01-06import gdb-2000-01-05 snapshotJason Molenda1-1/+2
1999-11-17import gdb-1999-11-16 snapshotJason Molenda1-15/+48
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+452
1999-04-16Initial creation of sourceware repositoryStan Shebs1-244/+0
1998-02-13Implement separate user (SPU) and interrupt (SPI) stack pointers.Andrew Cagney1-0/+5
1998-02-11Ensure zero-hardwired bits in DPSW remain zero.Andrew Cagney1-1/+4
1997-12-08Fix typo, REP_S was refering to REP_E register.Andrew Cagney1-1/+1
1997-12-08For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: SteppingAndrew Cagney1-10/+50
1997-12-04Add DM (bit 4) to PSW. See 7-1 for more info.Andrew Cagney1-0/+1
1997-12-03* d10v_sim.h (SEXT56): Define.Andrew Cagney1-48/+28
1996-10-30Fix -t option to work with memory mapping; Print PC in some error messagesMichael Meissner1-0/+6
1996-10-29Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-9/+22
1996-10-22Provide better statistics, particularly for doing VLIW work; Fix ldb to corre...Michael Meissner1-8/+19
1996-10-16Make read/write memory functions inlinedMichael Meissner1-6/+6
1996-10-16Make read/write memory functions inlinedMichael Meissner1-17/+19
1996-09-04More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags c...Michael Meissner1-10/+43
1996-09-04Enhance debug supportMichael Meissner1-0/+24
1996-08-29Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-9/+26
1996-08-27Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-2/+7
1996-08-03Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-4/+4
1996-08-02Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+104
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