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This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN. The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.
The sim does not implement an mmu at the moment. The sim does implement
fpu instructions via the common sim-fpu implementation.
sim/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Peter Gavin <pgavin@gmail.com>
* configure.tgt: Add or1k sim.
* or1k/README: New file.
* or1k/Makefile.in: New file.
* or1k/configure.ac: New file.
* or1k/mloop.in: New file.
* or1k/or1k-sim.h: New file.
* or1k/or1k.c: New file.
* or1k/sim-if.c: New file.
* or1k/sim-main.h: New file.
* or1k/traps.c: New file.
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Now that cconfig.h doesn't exist, there's no need to build in the common
subdir anymore. We leave the configure/Makefile files in there as there
is a helper for developers to generate the nltvals.def file. Once that
gets cleaned up in the future though, we can drop the build logic too.
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sim * configure.tgt: Add aarch64 entry.
* configure: Regenerate.
* sim/aarch64/configure.ac: New configure template.
* sim/aarch64/aclocal.m4: Generate.
* sim/aarch64/config.in: Generate.
* sim/aarch64/configure: Generate.
* sim/aarch64/cpustate.c: New file - functions for accessing
AArch64 registers.
* sim/aarch64/cpustate.h: New header.
* sim/aarch64/decode.h: New header.
* sim/aarch64/interp.c: New file - interface between GDB and
simulator.
* sim/aarch64/Makefile.in: New makefile template.
* sim/aarch64/memory.c: New file - functions for simulating
aarch64 memory accesses.
* sim/aarch64/memory.h: New header.
* sim/aarch64/sim-main.h: New header.
* sim/aarch64/simulator.c: New file - aarch64 simulator
functions.
* sim/aarch64/simulator.h: New header.
include/gdb * sim-aarch64.h: New file.
sim/test * configure: Regenerate.
* sim/aarch64: New directory.
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Since the testsuite subdir has to handle dynamic arch values already,
there's no real value in requiring arches to opt in to it. Most have
a testsuite now anyways, and we're requiring it in the future.
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Just enough to know the sim isn't totally broken.
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FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
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The current sim lacks any sort of tests. Start a basic framework and
add a simple one to test the add insn.
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* configure.tgt: Add it.
* configure: Regenerate.
* gennltvals.sh: Add msp430 support.
* nltvals.def: Regenerate.
* Makefile.in: New.
* aclocal.m4: Generate.
* config.in: Generate.
* configure.ac: New.
* configure: Generate.
* msp430-sim.c: New.
* msp430-sim.h: New.
* sim-main.h: New.
* trace.c: New.
* trace.h: New.
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* configure.tgt: Add rl78 support.
* configure: Regenerate.
* rl78: New directory.
* MAINTAINERS: Add myself as RL78 maintainer.
[gdb]
* NEWS: Mention RL78 simulator.
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Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite. There are about ~800 tests here,
so I'm only attaching a compressed patch of them. Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* configure.host (xscale*): Don't handle target.
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
gdb/gdbserver:
* README: Don't mention xscale*-*-linux*.
* configure.srv (xscale*-*-linux*): Don't handle target.
gdb/testsuite:
* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
targets.
* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
handle targets.
sim:
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
* configure: Regenerate.
sim/testsuite:
* configure: Regenerate.
* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
targets.
* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
xscale*-*-*.
* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
xscale*-*-*.
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This can boot Das U-Boot and a Linux kernel. It also supports Linux
userspace FLAT and FDPIC (dynamic and static) ELFs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The testsuite subdir has a note about unifying the target->subdir logic,
so do just that. The end goal here is to have `make check` work out of
the box without having to delve into dejagnu internals.
The target-specific logic is split out of the top level configure.ac file
and into a dedicated configure.tgt similar to other subprojects (gdb and
ld and etc...) with the difference that this file has to be included at
the m4 level instead of the shell level. This is necessary only because
autoconf requires AC_CONFIG_SUBDIRS be given a string literal and not a
variable value.
Then the toplevel and the testsuite configure files pull this in, the sim
subdir gets expanded into testsuite/site.exp, and the default sim run code
uses this info to set the sim path to the local compiled run file if it
hasn't already been specified.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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