aboutsummaryrefslogtreecommitdiff
path: root/sim/configure.tgt
AgeCommit message (Collapse)AuthorFilesLines
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger1-113/+0
One fewer file to worry about & manage.
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger1-1/+0
This is needed to move to automake & its dejagnu-provided logic, and eventually by the unified sim logic. The $arch is used only to figure out which `run` program to use when running tests, and as we move to a single top-level build, we can delete this and use sim/run directly.
2021-02-04sim: riscv: new portMike Frysinger1-0/+3
This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better.
2021-01-09sim: sh64: delete portMike Frysinger1-3/+0
Support for sh64 was dropped from bfd et al in 2018. Without that, the sim port is useless. So clean up this code too.
2020-08-04sim: eBPF simulatorJose E. Marchesi1-0/+3
This patch introduces the basics of an instruction-simulator for eBPF. The simulator is based on CGEN. gdb/ChangeLog: 2020-08-04 Jose E. Marchesi <jose.marchesi@oracle.com> * configure.tgt: Set gdb_sim for bpf-*-* targets. sim/ChangeLog: 2020-08-04 Jose E. Marchesi <jose.marchesi@oracle.com> David Faust <david.faust@oracle.com> * configure.tgt (sim_arch): Add entry for bpf-*-*. * configure: Regenerate. * MAINTAINERS: Add maintainer for the BPF simulator. * bpf/Makefile.in: New file. * bpf/bpf-helpers.c: Likewise. * bpf/bpf-helpers.def: Likewise. * bpf/bpf-helpers.h: Likewise. * bpf/bpf-sim.h: Likewise. * bpf/bpf.c: Likewise. * bpf/config.in: Likewise. * bpf/configure.ac: Likewise. * bpf/decode.h: Likewise. * bpf/eng.h: Likewise. * bpf/mloop.in: Likewise. * bpf/sim-if.c: Likewise. * bpf/sim-main.h: Likewise. * bpf/traps.c: Likewise. * bpf/configure: Generate. * bpf/aclocal.m4: Likewise. sim/testsuite/ChangeLog: 2020-08-04 David Faust <david.faust@oracle.com> Jose E. Marchesi <jose.marchesi@oracle.com> * configure: Regenerate. * sim/bpf/allinsn.exp: New file. * sim/bpf/alu.s: Likewise. * sim/bpf/alu32.s: Likewise. * sim/bpf/endbe.s: Likewise. * sim/bpf/endle.s: Likewise. * sim/bpf/jmp.s: Likewise. * sim/bpf/jmp32.s: Likewise. * sim/bpf/ldabs.s: Likewise. * sim/bpf/mem.s: Likewise. * sim/bpf/mov.s: Likewise. * sim/bpf/testutils.inc: Likewise. * sim/bpf/xadd.s: Likewise.
2019-09-23sim: Add PRU simulator portDimitar Dimitrov1-0/+3
A simulator port for the TI PRU I/O processor. v1: https://sourceware.org/ml/gdb-patches/2016-12/msg00143.html v2: https://sourceware.org/ml/gdb-patches/2017-02/msg00397.html v3: https://sourceware.org/ml/gdb-patches/2017-02/msg00516.html v4: https://sourceware.org/ml/gdb-patches/2018-06/msg00484.html v5: https://sourceware.org/ml/gdb-patches/2019-08/msg00584.html v6: https://sourceware.org/ml/gdb-patches/2019-09/msg00036.html gdb/ChangeLog: * NEWS: Mention new simulator port for PRU. sim/ChangeLog: * MAINTAINERS: Add myself as PRU maintainer. * configure: Regenerated. * configure.tgt: Add PRU. sim/common/ChangeLog: * gennltvals.sh: Add PRU libgloss target. * nltvals.def: Regenerate from the latest libgloss sources. sim/pru/ChangeLog: * Makefile.in: New file. * aclocal.m4: Regenerated. * config.in: Regenerated. * configure: Regenerated. * configure.ac: New file. * interp.c: New file. * pru.h: New file. * pru.isa: New file. * sim-main.h: New file.
2017-12-12sim: or1k: add or1k target to simStafford Horne1-0/+3
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN based sim so the bulk of the code is generated from the .cpu files by CGEN. The engine decode and execute logic in mloop uses scache with pseudo-basic-block extraction and supports both full and fast (switch) modes. The sim does not implement an mmu at the moment. The sim does implement fpu instructions via the common sim-fpu implementation. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure.tgt: Add or1k sim. * or1k/README: New file. * or1k/Makefile.in: New file. * or1k/configure.ac: New file. * or1k/mloop.in: New file. * or1k/or1k-sim.h: New file. * or1k/or1k.c: New file. * or1k/sim-if.c: New file. * or1k/sim-main.h: New file. * or1k/traps.c: New file.
2016-01-09sim: stop configuring common subdirMike Frysinger1-5/+0
Now that cconfig.h doesn't exist, there's no need to build in the common subdir anymore. We leave the configure/Makefile files in there as there is a helper for developers to generate the nltvals.def file. Once that gets cleaned up in the future though, we can drop the build logic too.
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton1-0/+3
sim * configure.tgt: Add aarch64 entry. * configure: Regenerate. * sim/aarch64/configure.ac: New configure template. * sim/aarch64/aclocal.m4: Generate. * sim/aarch64/config.in: Generate. * sim/aarch64/configure: Generate. * sim/aarch64/cpustate.c: New file - functions for accessing AArch64 registers. * sim/aarch64/cpustate.h: New header. * sim/aarch64/decode.h: New header. * sim/aarch64/interp.c: New file - interface between GDB and simulator. * sim/aarch64/Makefile.in: New makefile template. * sim/aarch64/memory.c: New file - functions for simulating aarch64 memory accesses. * sim/aarch64/memory.h: New header. * sim/aarch64/sim-main.h: New header. * sim/aarch64/simulator.c: New file - aarch64 simulator functions. * sim/aarch64/simulator.h: New header. include/gdb * sim-aarch64.h: New file. sim/test * configure: Regenerate. * sim/aarch64: New directory.
2015-03-29sim: testsuite: make subdir unconditionalMike Frysinger1-22/+0
Since the testsuite subdir has to handle dynamic arch values already, there's no real value in requiring arches to opt in to it. Most have a testsuite now anyways, and we're requiring it in the future.
2015-03-28sim: avr: start a basic testsuiteMike Frysinger1-0/+1
Just enough to know the sim isn't totally broken.
2015-03-28sim: ft32: new portJames Bowman1-0/+4
FT32 is a new high performance 32-bit RISC core developed by FTDI for embedded applications.
2014-03-10sim: msp430: start a test frameworkMike Frysinger1-0/+1
The current sim lacks any sort of tests. Start a basic framework and add a simple one to test the add insn.
2013-06-21 * msp430: New Directory.Nick Clifton1-0/+3
* configure.tgt: Add it. * configure: Regenerate. * gennltvals.sh: Add msp430 support. * nltvals.def: Regenerate. * Makefile.in: New. * aclocal.m4: Generate. * config.in: Generate. * configure.ac: New. * configure: Generate. * msp430-sim.c: New. * msp430-sim.h: New. * sim-main.h: New. * trace.c: New. * trace.h: New.
2011-11-29[sim]DJ Delorie1-0/+3
* configure.tgt: Add rl78 support. * configure: Regenerate. * rl78: New directory. * MAINTAINERS: Add myself as RL78 maintainer. [gdb] * NEWS: Mention RL78 simulator.
2011-06-04sim: bfin: import testsuiteMike Frysinger1-0/+1
Now that the common sim testsuite code supports .S and .c files, we can import the Blackfin testsuite. There are about ~800 tests here, so I'm only attaching a compressed patch of them. Other than adding files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was updated to mark Blackfin as having a testsuite, and sim/configure regenerated. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-04gdb:Joseph Myers1-1/+1
* configure.host (xscale*): Don't handle target. * configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't handle targets. gdb/gdbserver: * README: Don't mention xscale*-*-linux*. * configure.srv (xscale*-*-linux*): Don't handle target. gdb/testsuite: * gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target. * gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle targets. * gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't handle targets. sim: * configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't handle targets. * configure: Regenerate. sim/testsuite: * configure: Regenerate. * sim/arm/allinsn.exp (xscale*-*-*): Don't handle target. * sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle targets. * sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of xscale*-*-*. * sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target. * sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of xscale*-*-*.
2011-03-06sim: bfin: new portMike Frysinger1-0/+3
This can boot Das U-Boot and a Linux kernel. It also supports Linux userspace FLAT and FDPIC (dynamic and static) ELFs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-26sim: unify target->subdir handling for default testsMike Frysinger1-0/+113
The testsuite subdir has a note about unifying the target->subdir logic, so do just that. The end goal here is to have `make check` work out of the box without having to delve into dejagnu internals. The target-specific logic is split out of the top level configure.ac file and into a dedicated configure.tgt similar to other subprojects (gdb and ld and etc...) with the difference that this file has to be included at the m4 level instead of the shell level. This is necessary only because autoconf requires AC_CONFIG_SUBDIRS be given a string literal and not a variable value. Then the toplevel and the testsuite configure files pull this in, the sim subdir gets expanded into testsuite/site.exp, and the default sim run code uses this info to set the sim path to the local compiled run file if it hasn't already been specified. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
generated by cgit v1.1 at 2024-12-01 10:53:35 +0000