Age | Commit message (Collapse) | Author | Files | Lines |
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* cgen.sh: New file.
* cgen-scache.h: Deleted.
* cgen-scache.c: Only compile contents if WITH_SCACHE.
(scache_init): Use runtime computed size of SCACHE.
(scache_flush): Likewise.
* cgen-mem.h (GETIMEMU[QHSD]I): Declare.
([GS]ETT{QI,UQI,HI,UHI,SI,USI,DI,UDI}): Declare.
* cgen-sim.h: Scache support moved here.
(PC): Redo definition.
(ARGBUF,SCACHE,PARALLEL_EXEC): Provide forward decls.
(DECODE): Add parallel execution support.
Only include semantic label members if using switch.
(SWITCH,CASE,BREAK,DEFAULT,ENDSWITCH): Portable computed goto support.
(CGEN_CPU): Delete members exec_state, halt_sigrc, halt_jmp_buf.
(IADDR,CIA,SEM_ARG,EX_FN_NAME,SEM_FN_NAME,RECORD_IADDR,SEM_ARGBUF,
SEM_NEXT_PC,SEM_BRANCH_VIA_{CACHE,ADDR},SEM_NEW_PC_ADDR): Moved here
from cgen-types.h.
(engine_{stop,run,resume,halt,signal}): Delete decls.
* cgen-types.h (CGEN_{XCAT3,CAT3}): Delete.
(argbuf,scache): Delete forward decls.
(STATE): Delete decl.
* cgen-utils.c: Don't include decode.h, mem-ops.h, sem-ops.h.
Include cgen-mem.h, cgen-ops.h.
(engine_halt,engine_signal): Delete.
({ex,exc,sem,semc}_illegal): Delete.
(sim_disassemble_insn): Result of extract fn is in bits.
* genmloop.sh: Rewrite.
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* nltvals.def: Regenerated.
And add d30v sanitization.
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* Make-common.in (sim-signal.o): Add rule for.
(SIM_NEW_COMMON_OBJS): Add sim-signal.o.
* sim-abort.c: Don't include <signal.h>.
* sim-basics.h: #include "sim-signal.h".
* sim-break.c: Don't include <signal.h>.
(sim_handle_breakpoint): Replace SIGTRAP with SIM_SIGTRAP.
* sim-core.c: Don't include <signal.h>.
(SIGBUS): Delete definition.
(sim_core_signal): Replace SIGSEGV,SIGBUS with SIM_SIGSEGV,SIM_SIGBUS.
* sim-engine.c: Don't include <signal.h>.
(sim_engine_abort): Replace SIGABRT with SIM_SIGABRT.
* sim-reason.c (sim_stop_reason): Call sim_signal_to_host.
* sim-resume.c: Don't include <signal.h>.
(SIGTRAP): Delete definition.
(has_stepped): Replace SIGTRAP with SIM_SIGTRAP.
* sim-stop.c: Don't include <signal.h>.
(control_c_simulation): Replace SIGINT with SIM_SIGINT.
* sim-watch.c: Don't include <signal.h>.
(handle_watchpoint): Replace SIGINT with SIM_SIGINT.
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(LIB_OBJS): Add syscall.o.
(gentmap): Pass $(NL_TARGET) to $(CC).
(syscall.o): Add rule for.
(sim_main_headers): Add $(SIM_EXTRA_DEPS).
(sim-bits.o): Depend on $(sim-n-bits_h).
(sim-load.o): Depend on callback.h.
* Make-common.in (cgen-*.o): Update dependencies, mem-ops.h renamed to
cgen-mem.h, sem-ops.h renamed to cgen-ops.h.
* cgen-mem.h, cgen-ops.h: New files.
* aclocal.m4 (--enable-sim-scache): Pass -DWITH_SCACHE=0 for "=no".
* Makefile.in (nltvals.def): Depend on gennltvals.sh.
Rewrite build rule.
* callback.c: #include string.h or strings.h.
#include sys/types.h and sys/stat.h.
(cb_init_syscall_map,cb_init_errno_map,cb_init_open_map): Declare.
(enosys): New function.
(os_get_errno,os_open): Update.
(os_stat,os_fstat): New functions.
(os_init): Initialize syscall_map, errno_map, open_map.
(default_callback): Add entries for os_stat, os_fstat, syscall_map,
errno_map, open_map, signal_map, stat_map.
(cb_read_target_syscall_maps): New function.
(cb_target_to_host_syscall): New function.
(cb_host_to_target_errno): Renamed from host_to_target_errno.
(cb_target_to_host_open): Renamed from target_to_host_open.
(store): New function.
(cb_host_to_target_stat): New function.
* gentmap.c (sys_tdefs): New global.
(gen_targ_vals_h): Output target syscall numbers.
(gen_targ_map_c): Update. Output target syscall translation map.
* gentvals.sh: New first argument `target'. Preface table with
#ifdef NL_TARGET_$target if non-null target passed.
* gennltvals.sh: New file.
* nltvals.def: Regenerated.
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* sim-base.h: Add point to breakpoint list to sim_state_base.
* sim-break.c sim-break.h: New modules that implement intrinsic
breakpoint support.
* sim-module.c: Add breakpoint module.
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Use in d30v and tic80.
Make available a generic sim_read, sim_write implementation.
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o Add sim-memopt module - memory option processing.
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* aclocal.m4 (SIM_AC_OUTPUT): Build .gdbinit.
* Make-common.in (distclean): Delete .gdbinit.
(.gdbinit): Add rule for.
* configure: Regenerated to track ../common/aclocal.m4 changes.
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Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
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Use in tic80 and d30v simulators.
o Add signal hook to sim-core module
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* cgen-trace.[ch], cgen-types.h, cgen-utils.c, genmloop.sh: New files.
* sim-model.c: New file.
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* sim-module.c, sim-profile.c: New files.
* Make-common.in (SIM_PROFILE): Define
(CONFIG_CFLAGS): Add $(SIM_PROFILE).
(sim_main_headers): Add sim-module.h, sim-model.h, sim-profile.h.
(sim_module.o,sim-profile.o): Add rules for.
* aclocal.m4 (--enable-sim-trace): Allow symbolic arguments.
(--enable-sim-profile): Add.
* configure: Regenerated.
* sim-base.h (sim_state_base): New members init_list, uninstall_list,
model. Move trace and profile support to sim-{trace,profile}.h.
New members trace_data, profile_data.
* sim-basics.h: #include sim-module.h, sim-model.h, sim-profile.h.
* sim-config.h: Provide default definition of WITH_PROFILE.
(WITH_TRACE): Change default to -1.
(MAX_NR_PROCESSORS): Always define.
* sim-options.c: Move trace and profile support to
sim-{trace,profile}.h.
(sim_pre_argv_init): Moved to sim-model.c.
(standard_install): New function.
* sim-options.h (sim_pre_argv_init): Move decl to sim-model.c.
(standard_install): Declare.
* sim-trace.c: Tracing option handling moved here from sim-options.c.
(trace_install, trace_uninstall): New functions.
(trace_printf): Update reference to TRACE_FILE.
* sim-trace.h (TRACE_FOO_IDX): Moved here from sim-base.h.
(TRACE_foo): Bit masks for symbolic arguments to --enable-sim-trace.
(WITH_TRACE_FOO_P): Define.
(trace_install): Declare.
(TRACE_DATA): New struct.
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* nrun.c: New file.
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sim-io - interface to external IO
sim-events - event queue management
sim-core - hardware memory model (device
support optional but comming
soon).
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directory more widely available.
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* run.c, run.1: From sh directory.
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