| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2011-03-24 | sim: bfin: update AV and AC ASTAT bits with acc negation | Mike Frysinger | 1 | -6/+8 |
| 2011-03-24 | sim: bfin: allow byteop[123]p src regs to be the same | Mike Frysinger | 1 | -9/+0 |
| 2011-03-15 | sim: bfin: handle AZ updates with 16bit adds/subs | Mike Frysinger | 1 | -1/+1 |
| 2011-03-15 | sim: bfin: skip acc/ASTAT updates for moves | Mike Frysinger | 1 | -6/+6 |
| 2011-03-15 | sim: bfin: handle AN (negative overflows) in dsp mult insns | Mike Frysinger | 1 | -8/+33 |
| 2011-03-15 | sim: bfin: handle V overflows in dsp mult insns | Mike Frysinger | 1 | -7/+9 |
| 2011-03-15 | sim: bfin: decode ASTAT on failure | Mike Frysinger | 1 | -34/+72 |
| 2011-03-15 | sim: bfin: handle saturation with fract multiplications | Mike Frysinger | 1 | -0/+2 |
| 2011-03-06 | sim: bfin: new port | Mike Frysinger | 1 | -0/+6099 |
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