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Age	Commit message (Collapse)	Author	Files	Lines
2015-12-15	Fix invalid left shift of negative value	Dominik Vogt	1	-8/+8
	Fix occurrences of left-shifting negative constants in C code. sim/arm/ChangeLog: * thumbemu.c (handle_T2_insn): Fix left shift of negative value. * armemu.c (handle_v6_insn): Likewise. sim/avr/ChangeLog: * interp.c (sign_ext): Fix left shift of negative value. sim/mips/ChangeLog: * micromips.igen (process_isa_mode): Fix left shift of negative value. sim/msp430/ChangeLog: * msp430-sim.c (get_op, put_op): Fix left shift of negative value. sim/v850/ChangeLog: * simops.c (v850_bins): Fix left shift of negative value.
2015-07-14	Remove extraneous whitespace from ARM sim sources.	Nick Clifton	1	-45/+45
	* armcopro.c: Remove extraneous whitespace. * armdefs.h: Likewise. * armfpe.h: Likewise. * arminit.c: Likewise. * armopts.h: Likewise. * armos.c: Likewise. * armos.h: Likewise. * armrdi.c: Likewise. * armsupp.c: Likewise. * armvirt.c: Likewise. * bag.c: Likewise. * bag.h: Likewise. * communicate.c: Likewise. * communicate.h: Likewise. * dbg_conf.h: Likewise. * dbg_cp.h: Likewise. * dbg_hif.h: Likewise. * dbg_rdi.h: Likewise. * gdbhost.c: Likewise. * gdbhost.h: Likewise. * iwmmxt.c: Likewise. * iwmmxt.h: Likewise. * kid.c: Likewise. * main.c: Likewise. * maverick.c: Likewise. * parent.c: Likewise. * thumbemu.c: Likewise. * wrapper.c: Likewise.
2015-06-28	Add support for ARM v6 instructions.	Nick Clifton	1	-34/+1994
	* Makefile.in (SIM_EXTRA_CFLAGS): Add -lm. * armdefs.h (ARMdval, ARMfval): New types. (ARM_VFP_reg): New union. (struct ARMul_State): Add VFP_Reg and FPSCR fields. (VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor macros for the new VFP_Reg field. * armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT, QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8, USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX instructions. (handle_VFP_move): New function. (ARMul_Emulate16): Add checks for newly supported v6 instructions. Add support for VMRS, VMOV and MRC instructions. (Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when operating in v6 mode. * armemu.h (t_resolved): Define. * armsupp.c: Include math.h. (handle_VFP_xfer): New function. Handles VMOV, VSTM, VSTR, VPUSH, VSTM, VLDM and VPOP instructions. (ARMul_LDC): Test for co-processor 10 or 11 and pass call to the new handle_VFP_xfer function. (ARMul_STC): Likewise. (handle_VFP_op): New function. Handles VMLA, VMLS, VNMLA, VNMLS, VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP, VCMPE and VCVT instructions. (ARMul_CDP): Test for co-processor 10 or 11 and pass call to the new handle_VFP_op function. * thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros. (test_cond): New function. Tests a condition and returns non-zero if the condition has been met. (handle_IT_block): New function. (in_IT_block): New function. (IT_block_allow): New function. (ThumbExpandImm): New function. (handle_T2_insn): New function. Handles T2 thumb instructions. (handle_v6_thumb_insn): Add next_instr and pc parameters. (ARMul_ThumbDecode): Add support for IT blocks. Add support for v6 instructions. * wrapper.c (sim_create_inferior): Detect a thumb address and call SETT appropriately.
2014-03-14	Add support for instruction level tracing to the ARM simulator.	Nick Clifton	1	-25/+45
	* wrapper.c (op_print): New function. (sim_dis_read): New function. (print_insn): New function - disassembles the given instruction. (sim_trace): Note that tracing is now allowed. (sim_create_inferior): Default to emulating v6. Initialise the disassembler machinery. (sim_target_parse_command_line): Add support for -t -d and -z options. (sim_target_display_usage): Note existence of -d and -z options. (sim_open): Parse -t -d and -z options. * armemu.h: Add exports of trace, disas and trace_funcs. Add prototype for print_insn. * armemu.c (ARMul_Emulate26): Add tracing code. Delete unused variables. * thumbemu (handle_v6_thumb_insn): Delete unused variable Rd. Move Rm variable into switch cases. Add tracing code. * armcopro.c (XScale_cp15_init): Add a return value. (XScale_cp13_init): Likewise. (XScale_cp14_init): Likewise. (XScale_cp15_LDC): Delete unused function. (XScale_cp15_STC): Likewise. * maverick.c: Delete comment inside comment. (DSPInit): Delete unused function. (DSPMCR4): Fix compile time warning about missing parenthesis. (DSPMCR5): Likewise. (DSPCDP6): Delete unused variable opcode2.
2012-12-19	[sim] Update old contact info in GPL license notices	Joel Brobecker	1	-2/+1
	sim/ChangeLog: Update old contact info in GPL license notices.
2012-12-19	Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.	Joel Brobecker	1	-1/+1
	gdb/sim/ChangeLog: Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2005-05-24	(handle_v6_thumb_insn): New function.	Nick Clifton	1	-15/+72
	(ARMul_ThumbDecode): Call handle_v6_thumb_insn() when an undefined instruction binary is encountered.
2005-05-12	Update the address of the FSF organization	Nick Clifton	1	-1/+1

2002-05-27	Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced.	Nick Clifton	1	-4/+6

2002-05-23	When decoding a BLX(1) instruction do not add in the second bit of the base	Nick Clifton	1	-5/+2
	address - this has already been accounted for.
2001-03-06	Fix BLX(1) for Thumb	Nick Clifton	1	-5/+18

2000-11-30	Add support for ARM's v5TE architecture and Intel's XScale extenstions	Nick Clifton	1	-20/+81

2000-02-05	import gdb-2000-02-04 snapshot	Jason Molenda	1	-321/+345

1999-11-02	import gdb-1999-11-01 snapshot	Jason Molenda	1	-0/+2

1999-04-26	import gdb-19990422 snapshot	Stan Shebs	1	-0/+4

1999-04-16	Initial creation of sourceware repositorygdb-4_18-branchpoint	Stan Shebs	1	-0/+455