| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-02-13 | sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations | Mike Frysinger | 1 | -1/+2 | |
| 2015-07-14 | Remove extraneous whitespace from ARM sim sources. | Nick Clifton | 1 | -7/+7 | |
| * armcopro.c: Remove extraneous whitespace. * armdefs.h: Likewise. * armfpe.h: Likewise. * arminit.c: Likewise. * armopts.h: Likewise. * armos.c: Likewise. * armos.h: Likewise. * armrdi.c: Likewise. * armsupp.c: Likewise. * armvirt.c: Likewise. * bag.c: Likewise. * bag.h: Likewise. * communicate.c: Likewise. * communicate.h: Likewise. * dbg_conf.h: Likewise. * dbg_cp.h: Likewise. * dbg_hif.h: Likewise. * dbg_rdi.h: Likewise. * gdbhost.c: Likewise. * gdbhost.h: Likewise. * iwmmxt.c: Likewise. * iwmmxt.h: Likewise. * kid.c: Likewise. * main.c: Likewise. * maverick.c: Likewise. * parent.c: Likewise. * thumbemu.c: Likewise. * wrapper.c: Likewise. | |||||
| 2015-06-28 | Add support for ARM v6 instructions. | Nick Clifton | 1 | -10/+893 | |
| * Makefile.in (SIM_EXTRA_CFLAGS): Add -lm. * armdefs.h (ARMdval, ARMfval): New types. (ARM_VFP_reg): New union. (struct ARMul_State): Add VFP_Reg and FPSCR fields. (VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor macros for the new VFP_Reg field. * armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT, QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8, USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX instructions. (handle_VFP_move): New function. (ARMul_Emulate16): Add checks for newly supported v6 instructions. Add support for VMRS, VMOV and MRC instructions. (Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when operating in v6 mode. * armemu.h (t_resolved): Define. * armsupp.c: Include math.h. (handle_VFP_xfer): New function. Handles VMOV, VSTM, VSTR, VPUSH, VSTM, VLDM and VPOP instructions. (ARMul_LDC): Test for co-processor 10 or 11 and pass call to the new handle_VFP_xfer function. (ARMul_STC): Likewise. (handle_VFP_op): New function. Handles VMLA, VMLS, VNMLA, VNMLS, VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP, VCMPE and VCVT instructions. (ARMul_CDP): Test for co-processor 10 or 11 and pass call to the new handle_VFP_op function. * thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros. (test_cond): New function. Tests a condition and returns non-zero if the condition has been met. (handle_IT_block): New function. (in_IT_block): New function. (IT_block_allow): New function. (ThumbExpandImm): New function. (handle_T2_insn): New function. Handles T2 thumb instructions. (handle_v6_thumb_insn): Add next_instr and pc parameters. (ARMul_ThumbDecode): Add support for IT blocks. Add support for v6 instructions. * wrapper.c (sim_create_inferior): Detect a thumb address and call SETT appropriately. | |||||
| 2015-03-30 | sim: arm: clean up misc warnings | Mike Frysinger | 1 | -4/+1 | |
| Also delete a few unused funcs. | |||||
| 2012-12-19 | [sim] Update old contact info in GPL license notices | Joel Brobecker | 1 | -2/+1 | |
| sim/ChangeLog: Update old contact info in GPL license notices. | |||||
| 2012-12-19 | Update sim copyright headers from GPLv2-or-later to GPLv3-or-later. | Joel Brobecker | 1 | -1/+1 | |
| gdb/sim/ChangeLog: Update the non-FSF-copyrighted files in sim to GPLv3 or later. | |||||
| 2012-09-03 | PR sim/14540 | Nick Clifton | 1 | -1/+1 | |
| * armsupp.c (ARMul_MRC): Return 0 if access to the MRC instruction is denied. | |||||
| 2005-05-12 | Update the address of the FSF organization | Nick Clifton | 1 | -1/+1 | |
| 2002-05-27 | Only perform access checks if 'check' is set. | Nick Clifton | 1 | -1/+1 | |
| Report unknown machine numbers. Formatting tidy ups. | |||||
| 2001-10-18 | Add support for XScale's coprocessor access check register. | Nick Clifton | 1 | -215/+149 | |
| Fix formatting. | |||||
| 2001-05-08 | Check Mode not Bank in order to determine rocesor mode. | Nick Clifton | 1 | -1/+2 | |
| 2000-11-30 | Add support for ARM's v5TE architecture and Intel's XScale extenstions | Nick Clifton | 1 | -0/+2 | |
| 2000-07-04 | * armemu.h (GETSPSR): Call ARMul_GetSPSR(). | Alexandre Oliva | 1 | -3/+10 | |
| * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're extracted from state->Cpsr, but preserve the unused bits. (ARMul_GetCPSR): Get bits preserved in state->Cpsr. (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to get the full CPSR word. | |||||
| 2000-07-04 | * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New. | Alexandre Oliva | 1 | -23/+19 | |
| (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. (SETPSR, SET_INTMODE, SETCC): Removed. * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit mask. Use SETPSR_* to modify PSR. (ARMul_SetCPSR): Load all bits from value. * armemu.c (ARMul_Emulate, msr): Do not test bit mask. | |||||
| 2000-07-04 | * armdefs.h (SYSTEMBANK): Define as USERBANK. | Alexandre Oliva | 1 | -7/+0 | |
| * armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases. | |||||
| 2000-05-30 | Add support for v4 SystemMode. | Nick Clifton | 1 | -34/+59 | |
| 2000-02-08 | Fix compile time warning messages. | Nick Clifton | 1 | -8/+10 | |
| 2000-02-05 | import gdb-2000-02-04 snapshot | Jason Molenda | 1 | -424/+561 | |
| 2000-01-26 | import gdb-2000-01-26 snapshot | Jason Molenda | 1 | -5/+17 | |
| 1999-04-16 | Initial creation of sourceware repositorygdb-4_18-branchpoint | Stan Shebs | 1 | -0/+712 | |
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