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path: root/sim/arm/armemu.c
AgeCommit message (Expand)AuthorFilesLines
2015-03-30sim: arm: delete NEED_UI_LOOP_HOOK handlingMike Frysinger1-19/+0
2015-03-30sim: arm: clean up misc warningsMike Frysinger1-1/+4
2014-03-14Add support for instruction level tracing to the ARM simulator.Nick Clifton1-15/+38
2014-03-14Prevent writes to R15 via LDR or LDM from changing the ARM/Thumb state in pre...David McQuillan1-2/+14
2013-05-15sim: arm: add support for MOVW and MOVT instructionsMike Frysinger1-4/+8
2012-12-19[sim] Update old contact info in GPL license noticesJoel Brobecker1-2/+1
2012-12-19Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.Joel Brobecker1-1/+1
2007-02-15* armemu.c (handle_v6_insn): Fix typo in sign extension test of the sext and ...Nick Clifton1-1/+1
2005-09-192005-09-19 Paul Brook <paul@codesourcery.com>Paul Brook1-26/+26
2005-05-12Update the address of the FSF organizationNick Clifton1-1/+1
2005-04-25* armemu.c (handle_v6_insn): New function - emulate a few of the v6 instructi...Nick Clifton1-0/+295
2004-06-29Index: mn10200/ChangeLogAndrew Cagney1-3/+3
2003-03-30Remove use of __IWMMXT__.Nick Clifton1-11/+3
2003-03-27Add iWMMXt support to ARM simulatorNick Clifton1-0/+27
2002-07-05Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions.Nick Clifton1-68/+74
2002-05-27Only perform access checks if 'check' is set.Nick Clifton1-1/+1
2002-01-10Fix parameters passed to CPRead[13] and CPRead[14].Nick Clifton1-391/+417
2001-10-18Add support for XScale's coprocessor access check register.Nick Clifton1-444/+437
2001-05-11Fix handling of XScale LDRD and STRD instructions with post indexed addressin...Nick Clifton1-6/+6
2001-04-18* XScale coprocessor support.Matthew Green1-20/+87
2001-02-28Add support for disabling alignment checks when performing GDB interfaceNick Clifton1-2/+2
2001-02-16Remove Prefetch abort for breakpoints. Instead set the state to RESUME.Nick Clifton1-12/+2
2001-02-15Add code to preserve processor mode when a prefetchNick Clifton1-0/+11
2001-02-01Add parentheses ready for future conbtributionNick Clifton1-39/+63
2001-02-01Update base address register after restoring register bank.Nick Clifton1-26/+57
2000-12-19Fix test for StoreDouble Instruction.Nick Clifton1-12/+12
2000-12-08oops - remove redundant prototype introduced in previous deltaNick Clifton1-2/+0
2000-12-08Add emulation of double word load and store instructions.Nick Clifton1-3/+340
2000-11-30Add support for ARM's v5TE architecture and Intel's XScale extenstionsNick Clifton1-5/+491
2000-08-15Compute write back value for post increment loads beforeNick Clifton1-34/+41
2000-07-04* armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva1-1/+1
2000-07-04* armemu.h (INSN_SIZE): New macro.Alexandre Oliva1-12/+23
2000-07-04* armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva1-2/+2
2000-07-04* armemu.h (WRITEDESTB): New macro.Alexandre Oliva1-37/+35
2000-07-04* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva1-4/+4
2000-07-04* armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva1-8/+16
2000-06-22* armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva1-4/+3
2000-06-22* armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva1-4/+3
2000-05-30Add support for v4 SystemMode.Nick Clifton1-1/+5
2000-04-10* arm abort fixFrank Ch. Eigler1-3/+3
2000-02-08Fix compile time warning messages.Nick Clifton1-6/+5
2000-02-05import gdb-2000-02-04 snapshotJason Molenda1-2738/+3128
1999-12-07import gdb-1999-12-06 snapshotJason Molenda1-6/+6
1999-07-12import gdb-1999-07-12 snapshotJason Molenda1-0/+2
1999-04-26import gdb-19990422 snapshotStan Shebs1-5/+37
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+3454
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