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AgeCommit message (Expand)AuthorFilesLines
2016-01-10sim: drop targ-vals.def->nltvals.def indirectionMike Frysinger2-57/+5
2016-01-10sim: allow the inline configure option everywhereMike Frysinger3-51/+41
2016-01-10sim: drop --enable-sim-{regparm,stdcall} optionsMike Frysinger2-12/+6
2016-01-10sim: drop --enable-sim-cflags optionMike Frysinger2-23/+6
2016-01-09sim: drop common/cconfig.h in favor of a single config.hMike Frysinger3-3/+406
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2-2/+8
2016-01-05sim: aarch64: switch to common disassembler tracingMike Frysinger5-137/+30
2016-01-04sim: unify min/max macrosMike Frysinger2-17/+20
2016-01-04sim: aarch64: drop syscall.h include to fix buildTristan Gingold2-1/+4
2016-01-04sim: punt x86-specific bswap logicMike Frysinger2-21/+6
2016-01-03sim: drop host endian configure optionMike Frysinger3-261/+232
2016-01-03sim: convert to bfd_endianMike Frysinger2-17/+21
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker11-11/+11
2015-12-27sim: aarch64/msp430: fix disassembler usageMike Frysinger2-2/+7
2015-12-27sim: unify sim-hloadMike Frysinger2-1/+4
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger3-6/+6
2015-12-26sim: standardize sim_create_inferior handling of argv a bit moreMike Frysinger2-4/+9
2015-12-26sim: aarch64: move ChangeLog contentMike Frysinger1-0/+25
2015-12-15Add support for the MRS instruction to the AArch64 simulator.Nick Clifton1-9/+45
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton14-0/+31257