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path: root/sim/aarch64/simulator.c
AgeCommit message (Expand)AuthorFilesLines
2021-05-01sim: aarch64: fix 64-bit immediate shiftsMike Frysinger1-2/+2
2021-04-07Aarch64 sim fix for gcc-10 miscompilation.Jim Wilson1-2/+2
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2020-02-06sim/aarch64: Fix register ordering bug in blr (PR sim/25318)Carlo Bramini1-4/+3
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2017-04-22Fix ldn/stn multiple instructions. Fix testcases with unaligned data.Jim Wilson1-188/+102
2017-04-08Add support for fcvtl and fcvtl2.Jim Wilson1-0/+48
2017-04-08Support the fcmXX zero instructions.Jim Wilson1-0/+145
2017-03-25Fix bug with cmn/adds where C flag was incorrectly set.Jim Wilson1-1/+1
2017-03-03Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.Jim Wilson1-4/+15
2017-02-25Add missing smov support, and clean up existing umov support.Jim Wilson1-75/+126
2017-02-25Add missing cnt (popcount) instruction support.Jim Wilson1-0/+51
2017-02-19Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.Jim Wilson1-17/+25
2017-02-14Add self to aarch64 maintainers. Fix mla instruction.Jim Wilson1-49/+16
2017-02-14Fix bit/bif instructions.Jim Wilson1-10/+10
2017-02-14Add ldn/stn single support, fix ldnr support.Jim Wilson1-269/+282
2017-01-23Add support for cmtst.Jim Wilson1-0/+1
2017-01-17Fixes for addv and xtn2 instructions.Jim Wilson1-31/+16
2017-01-09Fix problems with the implementation of the uzp1 and uzp2 instructions.Jim Wilson1-17/+51
2017-01-04Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.Jim Wilson1-31/+45
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
2016-12-21Fix bugs with float compare and Inf operands.Jim Wilson1-0/+28
2016-12-13Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.Jim Wilson1-36/+15
2016-12-03Fix bugs with tbnz/tbz instructions.users/ARM/embedded-binutils-master-2016q4Jim Wilson1-3/+3
2016-12-01Fix bug with FP stur instructions.Jim Wilson1-6/+6
2016-08-15sim: unify symbol table handlingMike Frysinger1-2/+4
2016-08-12Undo the previous change to the aarch64 sim - exporting aarch64_step() - and ...Nick Clifton1-4/+9
2016-08-11Export the single step function from the AArch64 simulator.Nick Clifton1-5/+3
2016-07-21Use fsqrt() to calculate float (rather than double) square root.Nick Clifton1-1/+1
2016-06-30Add support for simulating big-endian AArch64 binaries.Jim Wilson1-1/+5
2016-05-06Add support for FMLA (by element) to AArch64 sim.Nick Clifton1-2/+72
2016-04-27Add support for the --trace-decode option to the AArch64 simulator.Nick Clifton1-7/+312
2016-04-04Ignore DWARF debug information with a version of 0 - assume that it is padding.Nick Clifton1-12/+189
2016-03-30Fix more bugs in AArch64 simulator.Nick Clifton1-172/+212
2016-03-29Tidy up AArch64 simulator code.Nick Clifton1-1418/+1397
2016-03-23More AArch64 simulator improvements.Nick Clifton1-221/+573
2016-03-18Add simulation of MUL and NEG instructions to AArch64 simulator.Nick Clifton1-53/+159
2016-03-03Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP i...Nick Clifton1-44/+81
2016-01-05sim: aarch64: switch to common disassembler tracingMike Frysinger1-36/+13
2016-01-04sim: unify min/max macrosMike Frysinger1-17/+14
2016-01-04sim: aarch64: drop syscall.h include to fix buildTristan Gingold1-1/+0
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
2015-12-15Add support for the MRS instruction to the AArch64 simulator.Nick Clifton1-9/+45
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton1-0/+13047