Age | Commit message (Expand) | Author | Files | Lines |
2017-07-25 | Fix typos in error and option messages in OPCODES library. | Nick Clifton | 3 | -36/+75 |
2017-07-24 | [AArch64] Fix the bit pattern order in the comments in auto-generated file | Jiong Wang | 3 | -1689/+1699 |
2017-07-21 | S/390: Support z14 as CPU name. | Andreas Krebbel | 2 | -1/+7 |
2017-07-20 | Update the German translation for the opcodes library. | Nick Clifton | 2 | -466/+890 |
2017-07-19 | [ARC] Add SecureShield AUX registers | claziss | 2 | -0/+21 |
2017-07-19 | [ARC] Add SJLI instruction. | Claudiu Zissulescu | 3 | -1/+27 |
2017-07-19 | [ARC] Add JLI support. | John Eric Martin | 4 | -2/+17 |
2017-07-18 | Fix spelling typos. | Yuri Chornovian | 3 | -2/+8 |
2017-07-14 | binutils/objdump: Fix disassemble for huge elf sections | Ravi Bangoria | 2 | -3/+8 |
2017-07-12 | Update PO files | Alan Modra | 16 | -875/+2049 |
2017-07-11 | Mark generated cgen files read-only | Alan Modra | 96 | -8/+211 |
2017-07-07 | Move print_insn_XXX to an opcodes internal header, again | Alan Modra | 4 | -3/+9 |
2017-07-05 | X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctly | Borislav Petkov | 2 | -6/+10 |
2017-07-05 | Fixup changelog entries for previous commit | Ramana Radhakrishnan | 1 | -0/+5 |
2017-07-04 | [Patch ARM] Support MVFR2 VFP Coprocessor register for ARMv8-A | Ramana Radhakrishnan | 1 | -0/+4 |
2017-07-04 | Regenerate configure. | Tristan Gingold | 2 | -10/+14 |
2017-07-03 | Regenerate pot files. | Tristan Gingold | 2 | -133/+150 |
2017-06-30 | MIPS/opcodes: Reorder LSA and DLSA instructions | Maciej W. Rozycki | 2 | -3/+8 |
2017-06-30 | MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support (ChangeLog) | Maciej W. Rozycki | 1 | -1/+1 |
2017-06-30 | MIPS: Add microMIPS XPA support | Maciej W. Rozycki | 2 | -0/+19 |
2017-06-30 | MIPS: Add microMIPS R5 support | Maciej W. Rozycki | 2 | -0/+8 |
2017-06-30 | MIPS: Fix XPA base and Virtualization ASE instruction handling | Maciej W. Rozycki | 3 | -24/+53 |
2017-06-30 | MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation | Maciej W. Rozycki | 2 | -3/+20 |
2017-06-29 | [ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over options | Anton Kolesov | 2 | -14/+11 |
2017-06-29 | [ARC] Fix handling of cpu=... disassembler option value | Anton Kolesov | 2 | -8/+14 |
2017-06-28 | [AArch64] Add dot product support for AArch64 to binutils | Tamar Christina | 5 | -179/+265 |
2017-06-28 | [ARM] Assembler and disassembler support Dot Product Extension | Jiong Wang | 2 | -0/+10 |
2017-06-28 | MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support | Maciej W. Rozycki | 5 | -73/+152 |
2017-06-23 | RISC-V: Fix SLTI disassembly | Andrew Waterman | 2 | -2/+7 |
2017-06-21 | x86: CET v2.0: Update incssp and setssbsy | H.J. Lu | 4 | -25/+41 |
2017-06-21 | x86: CET v2.0: Rename savessp to saveprevssp | H.J. Lu | 4 | -3/+9 |
2017-06-21 | x86: CET v2.0: Update NOTRACK prefix | H.J. Lu | 2 | -8/+13 |
2017-06-19 | Prevent address violation when attempting to disassemble a corrupt score binary. | Nick Clifton | 2 | -0/+6 |
2017-06-17 | Regen rx-decode.c | Alan Modra | 2 | -712/+716 |
2017-06-15 | i386-dis: Check valid bnd register | H.J. Lu | 2 | -0/+16 |
2017-06-15 | Prevent address violation problem when disassembling corrupt aarch64 binary. | Nick Clifton | 2 | -0/+9 |
2017-06-15 | Fix address violation when disassembling a corrupt RL78 binary. | Nick Clifton | 3 | -411/+424 |
2017-06-15 | Prevent invalid array accesses when disassembling a corrupt bfin binary. | Nick Clifton | 2 | -4/+12 |
2017-06-14 | Fix seg-fault when trying to disassemble a corrupt score binary. | Nick Clifton | 2 | -1/+7 |
2017-06-14 | Don't use print_insn_XXX in GDB | Yao Qi | 7 | -5/+26 |
2017-06-14 | Fix address violation problems when disassembling a corrupt RX binary. | Nick Clifton | 3 | -20/+37 |
2017-06-14 | [opcodes][arm] Remove bogus entry added by accident in former patch | Andre Vieira | 2 | -2/+4 |
2017-06-01 | S/390: idte/ipte fixes | Andreas Krebbel | 1 | -5/+2 |
2017-05-30 | [ARC] Allow CPU to be enforced via disassemble_info options | Anton Kolesov | 2 | -26/+114 |
2017-05-30 | S/390: Fix instruction types of csdtr and csxtr | Andreas Krebbel | 2 | -2/+6 |
2017-05-30 | S/390: Add missing operand to tb instruction | Andreas Krebbel | 1 | -1/+1 |
2017-05-30 | S/390: Add ipte/idte variants with optional operands | Andreas Krebbel | 2 | -1/+4 |
2017-05-30 | S/390: Improve error checking for optional operands | Andreas Krebbel | 2 | -3/+16 |
2017-05-24 | Move print_insn_XXX to an opcodes internal header | Yao Qi | 70 | -68/+198 |
2017-05-24 | Use disassemble.c:disassembler select rl78 disassembler | Yao Qi | 2 | -1/+10 |