| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2016-09-16 | [ARC] Disassemble correctly extension instructions. | Claudiu Zissulescu | 2 | -3/+7 |
| 2016-09-14 | Modify POWER9 support to match final ISA 3.0 documentation. | Peter Bergner | 2 | -22/+23 |
| 2016-09-14 | Stop the ARC disassembler from seg-faulting if initialised without a BFD pres... | Anton Kolesov | 2 | -3/+12 |
| 2016-09-12 | S/390: Add alternate processor names. | Andreas Krebbel | 2 | -9/+21 |
| 2016-09-12 | S/390: Fix kmctr instruction type. | Patrick Steuer | 2 | -1/+5 |
| 2016-09-07 | X86: Allow additional ISAs for IAMCU in assembler | H.J. Lu | 3 | -9/+5 |
| 2016-08-30 | Fixed issue with NULL pointer access on header var. | Cupertino Miranda | 2 | -1/+8 |
| 2016-08-26 | opcodes, gas: fix mnemonic of sparc camellia_fl | Jose E. Marchesi | 2 | -1/+6 |
| 2016-08-26 | Add missing ARMv8-M special registers | Thomas Preud'homme | 2 | -14/+29 |
| 2016-08-24 | X86: Add ptwrite instruction | H.J. Lu | 7 | -5329/+5392 |
| 2016-08-24 | [ARC] C++ compatibility for arc-dis.h | Anton Kolesov | 2 | -0/+13 |
| 2016-08-23 | [AArch64] Add V8_2_INSN macro | Richard Sandiford | 2 | -2/+9 |
| 2016-08-23 | [AArch64] Make more use of CORE/FP/SIMD_INSN | Richard Sandiford | 2 | -67/+72 |
| 2016-08-23 | [AArch64] Add OP parameter to aarch64-tbl.h macros | Richard Sandiford | 2 | -722/+727 |
| 2016-08-01 | Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions. | Andrew Jenner | 3 | -2/+40 |
| 2016-07-27 | MIPS/GAS: Implement microMIPS branch/jump compaction | Maciej W. Rozycki | 2 | -7/+21 |
| 2016-07-27 | Begin implementing ARC NPS-400 Accelerator instructions | Graham Markall | 5 | -32/+283 |
| 2016-07-21 | Set BFD_VERSION to 2.27.51 | H.J. Lu | 2 | -10/+14 |
| 2016-07-20 | Add support to the ARC disassembler for selecting instruction classes. | Claudiu Zissulescu | 3 | -127/+364 |
| 2016-07-13 | MIPS/opcodes: Address issues with NAL disassembly | Maciej W. Rozycki | 2 | -1/+6 |
| 2016-07-13 | opcodes,gas: support for the ldtxa SPARC instructions. | Jose E. Marchesi | 2 | -0/+42 |
| 2016-07-08 | FT32: adjust disassembly opcode match fields | jamesbowman | 2 | -2/+7 |
| 2016-07-01 | x86: allow suffix-less movzw and 64-bit movzb | Jan Beulich | 3 | -80/+14 |
| 2016-07-01 | x86: remove stray instruction attributes | Jan Beulich | 3 | -88/+103 |
| 2016-07-01 | x86/Intel: fix operand checking for MOVSD | Jan Beulich | 3 | -4/+9 |
| 2016-06-30 | Fix typo in comment | Yao Qi | 2 | -1/+5 |
| 2016-06-28 | [AArch64] Make register indices be full 64-bit values | Richard Sandiford | 2 | -2/+19 |
| 2016-06-25 | remove a few sentinals | Trevor Saunders | 3 | -8/+13 |
| 2016-06-23 | [ARC] Misc minor edits/fixes | Graham Markall | 2 | -3/+6 |
| 2016-06-22 | Add support for yet some more new ISA 3.0 instructions. | Peter Bergner | 2 | -5/+54 |
| 2016-06-22 | addmore extern C | Trevor Saunders | 2 | -0/+12 |
| 2016-06-21 | Arc assembler: Convert nps400 from a machine type to an extension. | Graham Markall | 4 | -198/+208 |
| 2016-06-17 | opcodes,gas: sparc: fix rdasr,wrasr,rdpr,wrpr,rdhpr,wrhpr insns. | Jose E. Marchesi | 3 | -52/+146 |
| 2016-06-17 | opcodes,gas: adjust sparc insns and make GAS aware of it | Jose E. Marchesi | 2 | -170/+175 |
| 2016-06-17 | bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine nu... | Jose E. Marchesi | 3 | -9/+90 |
| 2016-06-15 | Fix simple gas testsuite failures. | Nick Clifton | 2 | -14/+49 |
| 2016-06-15 | opcodes/arc: Fix extract for some add_s instructions | Andrew Burgess | 2 | -1/+5 |
| 2016-06-14 | opcode/gas: Fix incorrect dates on ChangeLog entries | Graham Markall | 1 | -3/+3 |
| 2016-06-14 | [ARC] Add ldbit for nps | Graham Markall | 3 | -0/+62 |
| 2016-06-14 | [ARC] Add deep packet inspection instructions for nps | Graham Markall | 3 | -15/+205 |
| 2016-06-14 | [ARC] Add arithmetic and logic instructions for nps | Graham Markall | 3 | -1/+293 |
| 2016-06-10 | S/390: Dump unknown instructions according to their length. | Andreas Krebbel | 2 | -17/+48 |
| 2016-06-09 | Print symbol names in comments for LDS/STS disassembly. | Denis Chertykov | 2 | -4/+15 |
| 2016-06-07 | PowerPC VLE | Alan Modra | 3 | -3666/+3678 |
| 2016-06-07 | [ARM] Add command line option for RAS extension. | Matthew Wahab | 2 | -2/+7 |
| 2016-06-03 | Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu. | Peter Bergner | 2 | -4/+10 |
| 2016-06-03 | Handle indirect branches for AMD64 and Intel64 | H.J. Lu | 4 | -7/+75 |
| 2016-06-02 | Add support for 48 and 64 bit ARC instructions. | Andrew Burgess | 4 | -93/+722 |
| 2016-06-01 | add more extern C | Trevor Saunders | 3 | -0/+21 |
| 2016-06-01 | Add support for some variants of the ARC nps400 rflt instruction. | Graham Markall | 2 | -5/+19 |
