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2000-06-262000-06-26 Scott Bambrough <scottb@netwinder.org>Scott Bambrough2-1/+8
* arm-dis.c (regnames): Add an additional register set to match the set used by GCC. Make it the default.
2000-06-22Ensure /usr/include and the like stay out of dependencies.Alan Modra3-5/+19
2000-06-202000-06-20 H.J. Lu <hjl@gnu.org>H.J. Lu3-16/+23
* Makefile.am: Rebuild dependency. * Makefile.in: Rebuild.
2000-06-19Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add supportNick Clifton9-4/+1731
for m68hc11 and m68hc12 processors.
2000-06-16 * disassemble.c (disassembler): Refer to the PowerPC 620 usingNicholas Duffek2-1/+6
bfd_mach_ppc_620 instead of 620.
2000-06-16Fix typo.Alan Modra1-172/+166
2000-06-12 * h8300-dis.c: Fix formatting.Jeff Law2-32/+40
(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl] correctly.
2000-06-09 * avr-dis.c (avr_operand): Bugfix for jmp/call address.Denis Chertykov2-1/+6
2000-06-07 * avr-dis.c: completely rewritten.Denis Chertykov2-587/+253
2000-06-02Fix formattingNick Clifton2-50/+57
2000-06-01Applied patch from Kazu Hirata <kazu@hxi.com> to fix disassembly of inc.lNick Clifton2-75/+56
and dec.l instructions
2000-05-31Add comment describoing why dgettext() is used in _() macro.Nick Clifton2-0/+18
2000-05-30Undo part of previous delta, so that _() calls dgettext() not gettext().Nick Clifton1-1/+1
2000-05-30Replace defines with those from intl/libgettext.h to quieten gcc warnings.Nick Clifton14-2771/+2603
2000-05-26Update dependencies.Alan Modra3-29/+46
2000-05-26* m10300-dis.c (disassemble): Don't assume 32-bit longs whenAlexandre Oliva2-13/+19
sign-extending operands.
2000-05-25Add ALONE flag to most of the short branch instructions.Donald Lindsay2-11/+16
2000-05-24 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.Diego Novillo2-2/+19
(STD_REGISTER_NAMES): New name for REGISTER_NAMES. (reg_names): Rename to std_reg_names. Change it to a char ** static variable. (std_reg_names): New name for reg_names. (set_mips_isa_type): Set reg_names to point to std_reg_names by default.
2000-05-22Regerbated after change to Makefile.amNick Clifton1-18/+22
2000-05-21Define LIBIBERTYNick Clifton2-0/+7
2000-05-16* cgen/opcodes fixFrank Ch. Eigler3-10/+12
* approved by nickc [opcodes/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * fr30-desc.h: Partially regenerated to account for changed CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros. * m32r-desc.h: Ditto. [include/opcode/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set. (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-15Add support for _x and _s flags to MSR instructionNick Clifton3-7/+22
2000-05-12Fix disassembly of DLRS{H|B} instructionNick Clifton2-1/+6
2000-05-11Don't mask top 32 bits of 64-bit address.Alan Modra2-2/+9
2000-05-10* ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodesGeoffrey Keating2-363/+368
also available in common mode when powerpc syntax is being used.
2000-05-08Kill compiler warnings with ATTRIBUTE_UNUSED.Alan Modra2-5/+11
2000-05-06Support for tic54x target.Timothy Wall8-0/+1140
2000-05-03* ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, forJ.T. Conklin3-4/+247
vector unit operands. (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector unit instruction formats. (PPCVEC): New macro, mask for vector instructions. (powerpc_operands): Add table entries for above operand types. (powerpc_opcodes): Add table entries for vector instructions. * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask. (print_insn_little_powerpc): Likewise. (print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-01 * avr-dis.c (reg_fmul_d): New. Extract destination register fromDenis Chertykov2-3/+130
FMUL instruction. (reg_fmul_r): New. Extract source register from FMUL instruction. (reg_muls_d): New. Extract destination register from MULS instruction. (reg_muls_r): New. Extract source register from MULS instruction. (reg_movw_d): New. Extract destination register from MOVW instruction. (reg_movw_r): New. Extract source register from MOVW instruction. (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU, EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2000-04-26 Add XCOFF64 support.Clinton Popetz4-166/+166
bfd: * Makefile.am (coff64-rs6000.lo): New rule. * Makefile.in: Regenerate. * coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data, xcoff_is_local_label_name, xcoff_rtype2howto, xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p, xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap, xcoff_write_archive_contents): No longer static, and prefix with _bfd_. (NO_COFF_SYMBOLS): Define. (xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in, xcoff64_swap_aux_out): New functions; handle xcoff symbol tables internally. (MINUS_ONE): New macro. (xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS relocation. (coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in, coff_SWAP_aux_out): Map to the new functions. * coff64-rs6000.c: New file. * libcoff.h (bfd_coff_backend_data): Add new fields _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length. (bfd_coff_force_symnames_in_strings, bfd_coff_debug_string_prefix_length): New macros for above fields. * coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic. Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead of using coff_swap_sym_in directly. (FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64. (coff_set_flags) Set magic for XCOFF64. (coff_compute_section_file_positions): Add symbol name length to string section length if bfd_coff_debug_string_prefix_length is true. (coff_write_object_contents): Don't do reloc overflow for XCOFF64. (coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of using coff_swap_lineno_in directly. (bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length fields. * coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force symbol names into strings table when bfd_coff_force_symnames_in_strings is true. * coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR, SET_RELOC_VADDR): New macros. (coff_swap_reloc_in, coff_swap_reloc_out): Use above macros. (coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C code. (coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64 changes within RS6000COFF_C specific code. (coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC, MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO. * reloc.c (bfd_perform_relocation, bfd_install_relocation): Extend existing hack on target name. * xcofflink.c (XCOFF_XVECP): Extend existing hack on target name. * coff-tic54x.c (ticof): Keep up to date with new fields in bfd_coff_backend_data. * config.bfd: Add bfd_powerpc_64_arch to targ_arch and define targ_selvecs to include rs6000coff64_vec for rs6000. * configure.in: Add rs6000coff64_vec case. * cpu-powerpc.c: New bfd_arch_info_type. gas: * as.c (parse_args): Allow md_parse_option to override -a listing option. * config/obj-coff.c (add_lineno): Change type of offset parameter from "int" to "bfd_vma." * config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine." (ppc_mach, ppc_subseg_align, ppc_target_format): New. (ppc_change_csect): Align correctly for XCOFF64. (ppc_machine): New function, which discards "ppc_machine" line. (ppc_tc): Cons for 8 when code is 64 bit. (md_apply_fix3): Don't check operand->insert. Handle 64 bit relocations. (md_parse_option): Handle -a64 and -a32. (ppc_xcoff64): New. * config/tc-ppc.h (TARGET_MACH): Define. (TARGET_FORMAT): Move to function. (SUB_SEGMENT_ALIGN): Use ppc_subseg_align. include: * include/coff/rs6k64.h: New file. opcodes: * configure.in: Add bfd_powerpc_64_arch. * disassemble.c (disassembler): Use print_insn_big_powerpc for 64 bit code.
2000-04-24Initialise signed_overflow fieldNick Clifton2-0/+8
2000-04-23Misc assembly/disassembly fixes.Timothy Wall7-3944/+5686
2000-04-21 * hppa-dis.c (extract_16): New function.Jeff Law2-19/+77
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of new operand types l,y,&,fe,fE,fx.
2000-04-21IA-64 ELF support.Jim Wilson23-0/+13187
2000-04-20* m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.Alexandre Oliva2-1/+10
(disassemble): Use them.
2000-04-14More portability patches. Include sysdep.h everywhere.Alan Modra47-256/+317
2000-04-09Remove ``-W -Wall'' from top-level Makefile/configure.Andrew Cagney5-513/+463
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to set it. Add configure option --enable-build-warnings. Re-generate all and sundry using auto*-000227.
2000-04-05opcodes:Joern Rennecke2-11/+18
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs. stc GBR,@-<REG_N> is available for arch_sh1_up. Group parallel processing insn with identical mnemonics together. Make three-operand psha / pshl come first. gas: * config/tc-sh.c (get_operands): There's no third operand if the first operand is an immediate.
2000-04-05sh-dsp REPEAT support:Joern Rennecke3-48/+68
opcodes: * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (sh_arg_type): Add A_PC. (sh_table): Update entries using immediates. Add repeat. * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. gas: * config/tc-sh.c (immediate): Delete. (sh_operand_info): Add immediate member. (parse_reg): Use A_PC for pc. (parse_exp): Add second argument 'op'. All callers changed. (parse_at): Expect pc to be coded as A_PC. Use immediate field in *op. (insert): Add fourth argument 'op'. All callers changed. (build_relax): Add second argument 'op'. All callers changed. (insert_loop_bounds): New function. (build_Mytes): Remove DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (assemble_ppi): Use immediate field in *operand. (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL. include/coff: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define. include/elf: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. bfd: * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and BFD_RELOC_SH_LOOP_END. * elf32-sh.c (sh_elf_howto_tab): Change special_func to sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore. Add entries for R_SH_LOOP_START and R_SH_LOOP_END. (sh_elf_reloc_loop): New function. (sh_elf_reloc): No need to test for always-to-be-ignored relocs any more. (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}. (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}. * bfd-in2.h, libbfd.h: Regenerate.
2000-04-04Move translated part of bug report string back into .c files soAlan Modra2-1/+3
xgettext can find it. Regnerate .pot files.
2000-04-04Use "gcc -MM" for dependencies, and update them.Alan Modra3-111/+146
2000-04-03Tidy some code. Print pc rel addresses as signed.Alan Modra2-60/+29
2000-04-02 * disassemble.c (disassembler_usage): Don't use a prototype. MarkIan Lance Taylor3-24/+31
the parameter ATTRIBUTE_UNUSED. * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-01* m10300-opc.c: SP-based offsets are always unsigned.Alexandre Oliva2-12/+16
2000-03-31Reverted the comment about inc/inc4, that was already implied by RN02.Alexandre Oliva1-1/+0
2000-03-31Fix typos. Add FIXME for 2-reg inc and inc4.Alexandre Oliva1-9/+10
2000-03-29Disassemble 0xde.. to "bal" [branch always] instead of "undefined".Nick Clifton2-3/+10
2000-03-27Fix value of SHORT_A1.Nick Clifton2-1/+6
Move SHORT_AR to end of list of short instructions.
2000-03-27 * Makefile.am (CFILES): Add avr-dis.c.Ian Lance Taylor3-0/+9
(ALL_MACHINES): Add avr-dis.lo.
2000-03-27ATMEL AVR microcontroller support.Alan Modra5-322/+1015
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