Age | Commit message (Expand) | Author | Files | Lines |
2016-02-24 | [OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support. | Renlin Li | 2 | -4/+92 |
2016-02-24 | [OPCODES][ARM]Fix mask for a few coprocessor opcodes. | Renlin Li | 2 | -8/+13 |
2016-02-24 | [OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,... | Renlin Li | 2 | -0/+28 |
2016-02-15 | Add parentheses to prevent truncated addresses | H.J. Lu | 2 | -2/+8 |
2016-02-10 | Add support for ARC instruction relaxation in the assembler. | Claudiu Zissulescu | 2 | -0/+132 |
2016-02-04 | Fix the encoding of the MSP430's RRUX instruction. | Nick Clifton | 2 | -2/+14 |
2016-02-02 | opcodes/cgen: Rework calculation of shift when inserting fields | Andrew Burgess | 15 | -42/+157 |
2016-02-02 | epiphany/disassembler: Improve alignment of output. | Andrew Burgess | 2 | -2/+7 |
2016-02-01 | Fix undefined compilation behaviour shifting a value into the sign bit of a s... | Michael McConville | 2 | -1/+7 |
2016-01-25 | [PATCH[ARM]Check mapping symbol while backward searching for IT block. | Renlin Li | 2 | -3/+83 |
2016-01-20 | [AArch64] Reject invalid immediate operands to MSR UAO | Matthew Wahab | 2 | -2/+9 |
2016-01-18 | MIPS: Remove remnants of 48-bit microMIPS instruction support | Maciej W. Rozycki | 2 | -35/+6 |
2016-01-17 | Regen configure | Alan Modra | 2 | -1/+5 |
2016-01-14 | Fix display of RL78 MOVW instructions that use the stack pointer. | Nick Clifton | 4 | -3/+23 |
2016-01-14 | [AArch64] Fix missing architecture checks for ARMv8.2 system registers. | Matthew Wahab | 2 | -9/+13 |
2016-01-12 | [ARM] Support ARMv8.2 RAS extension. | Matthew Wahab | 2 | -0/+13 |
2016-01-11 | Delete opcodes that have been removed from ISA 3.0. | Peter Bergner | 2 | -5/+8 |
2016-01-08 | m68k: fix constraints of move.[bw] for ISA_B/C | Andreas Schwab | 2 | -3/+9 |
2016-01-01 | Copyright update for binutils | Alan Modra | 270 | -273/+277 |
2016-01-01 | New 2016 binutils ChangeLog files | Alan Modra | 1 | -0/+14 |
2016-01-01 | binutils ChangeLog rotation | Alan Modra | 1 | -0/+0 |
2015-12-31 | opcodes/arc: Support dmb instruction with no operands | Andrew Burgess | 2 | -0/+8 |
2015-12-30 | Fix assorted ChangeLog errors | Alan Modra | 1 | -9/+8 |
2015-12-24 | Add assembler support for ARMv8-M Baseline | Thomas Preud'homme | 2 | -13/+21 |
2015-12-24 | Add assembler support for ARMv8-M Mainline | Thomas Preud'homme | 2 | -12/+25 |
2015-12-22 | RXv2 support update | Yoshinori Sato | 3 | -8/+17 |
2015-12-15 | Add support for RX V2 Instruction Set | Yoshinori Sato | 4 | -1280/+2862 |
2015-12-14 | [AArch64][PATCH 14/14] Support FP16 Adv.SIMD Scalar Shift By Immediate instru... | Matthew Wahab | 5 | -1021/+1052 |
2015-12-14 | [AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift By Immediate instructions. | Matthew Wahab | 5 | -1259/+1288 |
2015-12-14 | [AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar Pairwise instructions. | Matthew Wahab | 5 | -1101/+1181 |
2015-12-14 | [AArch64][PATCH 11/14] Add support for the 2H vector type. | Matthew Wahab | 3 | -1/+15 |
2015-12-14 | [AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified Immediate instructions. | Matthew Wahab | 5 | -1535/+1555 |
2015-12-14 | [AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across Lanes instructions. | Matthew Wahab | 5 | -1660/+1728 |
2015-12-14 | [AArch64][PATCH 7/14] Support FP16 Scalar Indexed Element instructions. | Matthew Wahab | 5 | -1215/+1275 |
2015-12-14 | [AArch64][PATCH 6/14] Support FP16 Vector Indexed Element instructions. | Matthew Wahab | 5 | -1580/+1648 |
2015-12-14 | [AArch64][PATCH 5/14] Support FP16 Scalar Two Register Misc. instructions. | Matthew Wahab | 5 | -1238/+1522 |
2015-12-14 | [AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions. | Matthew Wahab | 5 | -1773/+2169 |
2015-12-14 | [AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three Same instructions. | Matthew Wahab | 5 | -1081/+1207 |
2015-12-14 | [AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions. | Matthew Wahab | 5 | -1363/+1693 |
2015-12-14 | [AArch64][PATCH 1/14] Support ARMv8.2 FP16 Adv.SIMD instructions. | Matthew Wahab | 2 | -0/+8 |
2015-12-14 | [AArch64] Fix errors rebasing the ARMv8.2 AT and system registers patch | Matthew Wahab | 2 | -6/+15 |
2015-12-12 | Enable 2 operand form of powerpc mfcr with -many | Alan Modra | 2 | -3/+8 |
2015-12-11 | [AArch64][Patch 5/5] Add instruction PSB CSYNC | Matthew Wahab | 5 | -25/+44 |
2015-12-11 | [AArch64][Patch 4/5] Support HINT aliases taking operands. | Matthew Wahab | 8 | -4/+68 |
2015-12-11 | [AArch64][Patch 3/5] Adjust maximum number of instruction aliases. | Matthew Wahab | 2 | -2/+6 |
2015-12-11 | [AArch64][Patch 2/5] Add Statistical Profiling Extension system registers. | Matthew Wahab | 2 | -1/+39 |
2015-12-10 | [Aarch64] Support ARMv8.2 AT instructions | Matthew Wahab | 2 | -0/+14 |
2015-12-10 | [AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction. | Matthew Wahab | 2 | -0/+21 |
2015-12-10 | [AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction. | Matthew Wahab | 3 | -47/+74 |
2015-12-10 | [AArch64][binutils] Add support for ARMv8.2 PSTATE.UAO. | Matthew Wahab | 2 | -0/+21 |