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2019-05-16[PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrintAndre Vieira2-2/+383
2019-05-16[PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores ...Andre Vieira2-1/+368
2019-05-16[PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and v...Andre Vieira2-0/+278
2019-05-16[PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst...Andre Vieira2-0/+191
2019-05-16[PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfm...Andre Vieira2-14/+222
2019-05-16[PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmpAndre Vieira2-12/+642
2019-05-16[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in...Andre Vieira2-0/+12
2019-05-16[PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructionsAndre Vieira2-4/+279
2019-05-14A series of fixes to addres problems detected by compiling the assembler with...Nick Clifton2-1/+10
2019-05-10Add macro expansions for ADD, SUB, DADD and DSUB for MIPS r6Faraz Shahbazker2-4/+9
2019-05-11PowerPC objdump -MrawAlan Modra2-3/+10
2019-05-09Update printing of optional operands during disassembly.Peter Bergner1-9/+8
2019-05-09[binutils][aarch64] Add SVE2 instructions.Matthew Malcomson3-941/+4569
2019-05-09[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson6-22/+41
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson3-0/+24
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson7-14/+36
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson3-0/+19
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson8-32/+73
2019-05-09[binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson3-0/+25
2019-05-09[binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson3-0/+9
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson5-0/+19
2019-05-09[binutils][aarch64] New SVE_ADDR_ZX operand.Matthew Malcomson6-66/+100
2019-05-09[binutils][aarch64] New SVE_Zm3_11_INDEX operand.Matthew Malcomson7-14/+39
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson5-0/+23
2019-05-09[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.Matthew Malcomson7-38/+59
2019-05-09[binutils][aarch64] Allow movprfx for SVE2 instructions.Matthew Malcomson2-1/+8
2019-05-09[binutils][aarch64] SVE2 feature extension flags.Matthew Malcomson2-0/+47
2019-05-06Add load-link, store-conditional paired EVA instructionsFaraz Shahbazker3-3/+22
2019-05-01[BINUTILS, AArch64] Enable Transactional Memory ExtensionSudakshina Das6-1086/+1136
2019-04-29S12Z: Opcodes: Fix crash when trying to decode a truncated operation.John Darrington2-1/+5
2019-04-26[MIPS] Add load-link, store-conditional paired instructionsAndrew Bennett2-0/+13
2019-04-24S12Z: Opcodes: Handle bit map operations with non-canonical operands.John Darrington2-3/+6
2019-04-24S12Z: s12z-opc.h: Add extern "C" bracketingJohn Darrington2-1/+13
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira2-1/+59
2019-04-15[binutils, ARM, 15/16] Add support for VSCCLRMAndre Vieira2-0/+38
2019-04-15[opcodes, ARM, 14/16] Add mode availability to coprocessor table entriesAndre Vieira2-413/+443
2019-04-15[binutils, ARM, 13/16] Add support for CLRMAndre Vieira2-2/+21
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira2-0/+42
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira2-0/+13
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira2-0/+22
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira2-0/+6
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira2-0/+22
2019-04-15[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M MainlineAndre Vieira2-0/+15
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira2-0/+9
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira2-0/+22
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira2-0/+12
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira2-0/+5
2019-04-12S12Z: opcodes: Replace "operator" with "optr".John Darrington4-29/+34
2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das6-165/+186
2019-04-11[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instructionSudakshina Das5-1541/+1572
generated by cgit v1.1 at 2025-01-02 03:52:48 +0000