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2008-01-29 * ppc-opc.c: Support optional L form mtmsr.Alan Modra2-2/+6
2008-01-24gas/testsuite/H.J. Lu2-7/+11
2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-sib.s: Add tests for r12. * gas/i386/x86-64-sib-intel.d: Updated. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-23gas/H.J. Lu3-2/+7
2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_show_usage): Replace tabs with spaces. gas/testsuite/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10. * gas/i386/x86-64-arch-1.d: New. * gas/i386/x86-64-arch-1.s: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.
2008-01-232008-01-23 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-0/+13
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
2008-01-22gas/H.J. Lu6-1921/+1929
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_target_format): Remove cpummx2. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: New. * gas/i386/arch-11.s: Likewise. * gas/i386/arch-12.d: Likewise. * gas/i386/arch-12.s: Likewise. * gas/i386/i386.exp: Run arch-11 and arch-12. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuMMX2. (cpu_flags): Likewise. * i386-opc.h (CpuMMX2): Removed. (CpuSSE): Updated. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-22gas/H.J. Lu3-0/+18
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. (cpu_sub_arch_name): Remove const. (cpu_arch): Add .vmx and .smx. (set_cpu_arch): Append cpu_sub_arch_name. (md_parse_option): Support -march=CPU[,+EXTENSION...]. (md_show_usage): Updated. * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. * doc/as.texinfo: Update i386 -march option. * doc/c-i386.texi: Update -march= for ISA. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10-1.l: New. * gas/i386/arch-10-1.s: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-2.s: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-3.s: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10-4.s: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2, arch-10-3 and arch-10-4. * gas/i386/nops-2.s: Use movsbl instead of cmove. * gas/i386/nops-2-i386.d: Updated. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and CPU_SMX_FLAGS. * i386-init.h: Regenerated.
2008-01-16gas/testsuite/H.J. Lu3-2/+7
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/prescott.s: Add tests for movddup in Intel syntax. * gas/i386/x86-64-prescott.s: Likewise. * gas/i386/prescott.d: Updated. * gas/i386/x86-64-prescott.d: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Use Qword on movddup. * i386-tbl.h: Regenerated.
2008-01-15gas/H.J. Lu3-0/+44
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Also zap movzx and movsx suffix for AT&T syntax. gas/testsuite/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add more tests for movsx and movzx. * gas/i386/x86_64.s: Likewise. * gas/i386/inval.s: Remove tests for movsxw and movzxw. * gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw, movsxl, movzxb and movzxw. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. * i386-tbl.h: Regenerated.
2008-01-152008-01-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-9/+29
* i386-dis.c (Mx): New. (PREFIX_0FC3): Likewise. (PREFIX_0FC7_REG_6): Updated. (dis386_twobyte): Use PREFIX_0FC3. (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on movntss.
2008-01-15gas/H.J. Lu6-5555/+5674
2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_reg_size): New. (match_mem_size): Likewise. (operand_size_match): Likewise. (operand_type_match): Also clear all size fields. (match_template): Skip Intel syntax when in AT&T syntax. Call operand_size_match to check operand size. (i386_att_operand): Set the mem field to 1 for memory operand. (i386_intel_operand): Likewise. gas/testsuite/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movsx, movzx and movnti. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add IntelSyntax. (operand_types): Add Mem. * i386-opc.h (IntelSyntax): New. * i386-opc.h (Mem): New. (Byte): Updated. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add intelsyntax. (i386_operand_type): Add mem. * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more instructions. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-142008-01-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* i386-opc.h (Byte): Fix a typo.
2008-01-12gas/testsuite/H.J. Lu7-8463/+11435
2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/i386.s: Add tests for fnstsw and fstsw. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/intel.s: Use word instead of dword on ss. * gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in and out. * gas/i386/prefix.s: Remove invalid fstsw. * gas/i386/inval.l: Updated. * gas/i386/intelbad.l: Likewise. * gas/i386/i386.d: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/prefix.d: Updated. gas/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (_i386_insn): Update comment. (operand_type_match): Also clear unspecified. (operand_type_register_match): Likewise. (parse_operands): Initialize unspecified. (i386_intel_operand): Likewise. (match_template): Check memory and accumulator operand size. (i386_att_operand): Clear unspecified on register operand. (intel_e11): Likewise. (intel_e09): Set operand size and clean unspecified for "XXX PTR". opcodes/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (operand_type_init): Add Dword to OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, Qword and Xmmword. (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. (set_bitfield): Make Mmword an alias of Qword. Make Oword an alias of Xmmword. * i386-opc.h (CheckSize): Removed. (Byte): Updated. (Word): Likewise. (Dword): Likewise. (Qword): Likewise. (Xmmword): Likewise. (FWait): Updated. (OTMax): Likewise. (i386_opcode_modifier): Remove checksize, byte, word, dword, qword and xmmword. (Fword): New. (TBYTE): Likewise. (Unspecified): Likewise. (Anysize): Likewise. (i386_operand_type): Add byte, word, dword, fword, qword, tbyte xmmword, unspecified and anysize. * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-10gas/testsuite/H.J. Lu2-11/+19
2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/nops.s: Add more tests with opcodes from 0x0f19 to 0x0f1f. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. opcodes/ 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. (REG_0F18): Updated. (reg_table): Updated. (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
2008-01-092008-01-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+5
* i386-gen.c (set_bitfield): Use fail () on error.
2008-01-082008-01-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+24
* i386-gen.c (lineno): New. (filename): Likewise. (set_bitfield): Report filename and line numer on error. (process_i386_opcodes): Set filename and update lineno. (process_i386_registers): Likewise.
2008-01-05gas/H.J. Lu5-77/+172
2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic. * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic only. (md_assemble): Remove Intel mode workaround. (match_template): Check support for old gcc, AT&T mnemonic and Intel Syntax. (md_parse_option): Don't set intel_mnemonic to 0 for OPTION_MOLD_GCC. gas/testsuite/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp, fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp. * gas/i386/intel.d: Updated. * gas/i386/intel.e: Likewise. opcodes/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to ATTSyntax. * i386-opc.h (IntelMnemonic): Renamed to .. (ATTSyntax): This (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax and intelsyntax. * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. * i386-tbl.h: Regenerated.
2008-01-042008-01-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu6-6/+15
* i386-gen.c: Update copyright to 2008. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-04gas/testsuite/H.J. Lu3-24/+30
2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rexw.d: New. * gas/i386/rexw.s: Likewise. * gas/i386/x86-64-sse4_1-intel.d: Updated. * gas/i386/x86-64-sse4_1.d: Likewise. opcodes/ 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, pextrb, pextrw, pinsrb, pinsrw and pmovmskb. * i386-tbl.h: Regenerated.
2008-01-04gas/H.J. Lu6-1521/+1530
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch_flags_not): Removed. (cpu_flags_not): Likewise. (cpu_flags_match): Updated to check 64bit and arch. (set_code_flag): Remove cpu_arch_flags_not. (set_16bit_gcc_code_flag): Likewise. (set_cpu_arch): Likewise. (md_begin): Likewise. (parse_insn): Call cpu_flags_match to check 64bit and arch. (match_template): Likewise. gas/testsuite/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-9.d: New file. * gas/i386/arch-9.s: Likewise. * gas/i386/i386.exp: Run arch-9. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and CpuSSE4_2_Or_ABM. (cpu_flags): Likewise. * i386-opc.h (CpuSSE4_1_Or_5): Removed. (CpuSSE4_2_Or_ABM): Likewise. (CpuLM): Updated. (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 and CpuPadLock, respectively. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03gas/H.J. Lu4-1889/+1894
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Use the xmmword field instead of no_xsuf. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove No_xSuf. * i386-opc.h (No_xSuf): Removed. (CheckSize): Updated. * i386-tbl.h: Regenerated.
2008-01-03gas/testsuite/H.J. Lu6-1475/+1495
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-5.d: New file. * gas/i386/arch-5.s: Likewise. * gas/i386/arch-6.d: Likewise. * gas/i386/arch-6.s: Likewise. * gas/i386/arch-7.d: Likewise. * gas/i386/arch-7.s: Likewise. * gas/i386/arch-8.d: Likewise. * gas/i386/arch-8.s: Likewise. * gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_2_Or_ABM. * i386-opc.h (CpuSSE4_2_Or_ABM): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_2_or_abm. * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of CpuABM|CpuSSE4_2 on popcnt. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03Add a missing ','.H.J. Lu1-1/+1
2008-01-03gas/testsuite/H.J. Lu2-8/+12
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movq. * gas/i386/x86_64.s: Likewise. * gas/i386/i386.d Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h: Update comments.
2008-01-03Fix a typo.H.J. Lu1-1/+1
2008-01-022008-01-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-13/+20
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise.
2008-01-02gas/H.J. Lu5-1982/+2031
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX. Check memory size in Intel mode. (process_suffix): Handle XMMWORD_MNEM_SUFFIX. (intel_e09): Likewise. * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New. gas/testsuite/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/intel.s: Use QWORD on movq instead of DWORD. * gas/i386/inval.s: Add tests for movq. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/inval.l: Updated. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.h (No_xSuf): New. (CheckSize): Likewise. (Byte): Likewise. (Word): Likewise. (Dword): Likewise. (QWord): Likewise. (Xmmword): Likewise. (FWait): Updated. (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is used. * i386-tbl.h: Regenerated.
2008-01-02Move 2007 ChangeLog entries to ChangeLog-2007.H.J. Lu2-1856/+1864
2008-01-02* m88k-dis.c (instructions): Fix fcvt.* instructions.Mark Kettenis2-9/+14
From Miod Vallat.
2007-12-31Fix a typo in ChangeLog.H.J. Lu1-2/+2
2007-12-31gas/testsuite/H.J. Lu4-23/+77
2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd. * gas/i386/simd.s: Likewise. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/inval.l: Updated. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/sse2.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd. (putop): Handle '%' and "LQ". * i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd. * i386-tbl.h: Regenerated.
2007-12-28Add ',' at the end of cpu_flag_init.H.J. Lu1-1/+1
2007-12-28gas/testsuite/H.J. Lu6-1478/+1498
2007-12-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-1.d: New file. * gas/i386/arch-1.s: Likewise. * gas/i386/arch-2.d: Likewise. * gas/i386/arch-2.s: Likewise. * gas/i386/arch-3.d: Likewise. * gas/i386/arch-3.s: Likewise. * gas/i386/arch-4.d: Likewise. * gas/i386/arch-4.s: Likewise. * gas/i386/i386.exp: Run arch-1, arch-2, arch-3 and arch-4. opcodes/ 2007-12-28 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_1_Or_5. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuSSE4_1_Or_5): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_1_or_5. * i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5 on ptest roundpd, roundps, roundsd and roundss.
2007-12-24gas/H.J. Lu5-1549/+2940
2007-12-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (set_intel_mnemonic): New. (intel_mnemonic): Likewise. (old_gcc): Likewise. (OPTION_MMNEMONIC): Likewise. (OPTION_MSYNTAX): Likewise. (OPTION_MINDEX_REG): Likewise. (OPTION_MNAKED_REG): Likewise. (OPTION_MOLD_GCC): Likewise. (md_pseudo_table): Add .intel_mnemonic and .att_mnemonic. (match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T mnemonic is specified. Don't allow old gcc support if old_gcc is 0. (md_longopts): Add -mmnemonic, -msyntax, -mindex-reg, -mmnaked-reg and -mold-gcc. (md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX, OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC. * doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg and AT&T mnemonic vs. Intel mnemonic. gas/testsuite/ 2007-12-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler. * gas/i386/compat.d: Likewise. * gas/i386/i386.exp: Pass -mmnemonic=att to assembler for "float". Pass -mold-gcc to assembler for "general". opcodes/ 2007-12-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and IntelMnemonic. * i386-opc.h (OldGcc): New. (ATTMnemonic): Likewise. (IntelMnemonic): Likewise. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add oldgcc, attmnemonic and intelmnemonic. * i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul, fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and IntelMnemonic. * i386-tbl.h: Regeneratd.
2007-12-22binutils/H.J. Lu2-22/+36
2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * doc/binutils.texi: Document the new intel-mnemonic and intel-mnemonic options for i386 disassembler. gas/testsuite/ 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/compat-intel.d: New file. * gas/i386/compat.d: Likewise. * gas/i386/compat.s: Likewise. * gas/i386/i386.exp: Run compat. opcodes/ 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (intel_mnemonic): New. (print_i386_disassembler_options): Display att-mnemonic and intel-mnemonic options. (print_insn): Handle att-mnemonic and intel-mnemonic. (float_reg): Replace SYSV386_COMPAT with "!M" and "M". (putop): Handle "!M" and "M".
2007-12-212007-12-21 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-9/+19
* Makefile.am (i386-gen.o): Also depend on $(srcdir)/../include/opcode/i386.h. * Makefile.in: Regenerated.
2007-11-29 bfd/Mark Shinwell3-36/+290
* archures.c (bfd_mach_mips_loongson_2e): New. (bfd_mach_mips_loongson_2f): New. * bfd-in2.h (bfd_mach_mips_loongson_2e): New. (bfd_mach_mips_loongson_2f): New. * cpu-mips.c: Add I_loongson_2e and I_loongson_2f to anonymous enum. (arch_info_struct): Add Loongson-2E and Loongson-2F entries. * elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E and Loongson-2F flags. (mips_set_isa_flags): Likewise. (mips_mach_extensions): Add Loongson-2E and Loongson-2F entries. binutils/ * readelf.c (get_machine_flags): Handle Loongson-2E and -2F flags. gas/ * config/tc-mips.c (mips_cpu_info_table): Add loongson2e and loongson2f entries. * doc/c-mips.texi: Document -march=loongson{2e,2f} options. gas/testsuite/ * gas/mips/mips.exp: Add loongson-2e and -2f tests. * gas/mips/loongson-2e.d: New. * gas/mips/loongson-2e.s: New. * gas/mips/loongson-2f.d: New. * gas/mips/loongson-2f.s: New. include/elf/ * mips.h (E_MIPS_MACH_LS2E): New. (E_MIPS_MACH_LS2F): New. include/opcode/ * mips.h (INSN_LOONGSON_2E): New. (INSN_LOONGSON_2F): New. (CPU_LOONGSON_2E): New. (CPU_LOONGSON_2F): New. (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags. opcodes/ * mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F entries. * mips-opc.c (IL2E): New. (IL2F): New. (mips_builtin_opcodes): Add Loongson-2E and -2F instructions. Allow movz and movn for Loongson-2E and -2F. Add movnz entry. Move coprocessor encodings to the end of the table. Allow certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 include/opcode/Mark Shinwell2-138/+148
* mips.h (INSN_ISA*): Redefine certain values as an enumeration. Update comments. (mips_isa_table): New. (ISA_MIPS*): Redefine to match enumeration. (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA* values. opcodes/ * mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New. (mips_builtin_opcodes): Use these new I* values.
2007-11-272007-11-27 Andreas Krebbel <krebbel1@de.ibm.com>Andreas Krebbel1-6/+6
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt", "tgxt"): Removed. ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
2007-11-272007-11-27 Andreas Krebbel <krebbel1@de.ibm.com>Andreas Krebbel1-0/+6
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt", "tgxt"): Removed. ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added. 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/zarch-z9-ec.d: ("tcet", "tcdt", "tcxt", "tget", "tgdt", "tgxt"): Removed. ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added. * gas/s390/zarch-z9-ec.s: Likewise.
2007-11-14gas/H.J. Lu7-555/+576
2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-07PR gas/5228Nick Clifton2-3/+9
* m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads.
2007-11-07* ia64-dis.c (print_insn_ia64): Generate symbolic names for crTristan Gingold2-0/+41
registers instead of register number. * gas/ia64/regs.d: Expect symbolic names for cr registers due to improved disassembler.
2007-11-07* arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators.Nick Clifton2-4/+9
2007-11-06 * ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodesPeter Bergner2-3/+6
which are not included in the "Preliminary Decimal Floating-Point Architecture" document.
2007-11-01gas/H.J. Lu4-1460/+1470
2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Replace no_xsuf with no_ldsuf. (match_template): Likewise. opcodes/ 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Replace No_xSuf with No_ldSuf. * i386-opc.tbl: Likewise. * i386-opc.h (No_xSuf): Renamed to ... (No_ldSuf): This. (FWait): Updated.
2007-11-01gas/H.J. Lu5-1447/+1489
2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Check addrprefixop0 to see if the address size override prefix changes the size of the first operand. (check_byte_reg): Don't warn if byteokintel is set. (check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword is set. (check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword is set. gas/testsuite/ 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.d: New. * gas/i386/i386.s: Likewise. * gas/i386/i386.exp: Run i386. * gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq, movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq, movzbw, movzwl and movzwq. * gas/i386/x86_64.d: Updated. opcodes/ 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword, ToQword and AddrPrefixOp0. * i386-opc.h (ByteOkIntel): New. (ToDword): Likewise. (ToQword): Likewise. (AddrPrefixOp0): Likewise. (IsPrefix): Updated. (i386_opcode_modifier): Add byteokintel, todword, toqword and addrprefixop0. * i386-opc.tbl (cvtss2si): Add ToQword. (cvttss2si): Likewise. (cvtsd2si): Add ToDword. (cvttsd2si): Likewise. (monitor): Add AddrPrefixOp0. (invlpga): Likewise. (vmload): Likewise. (vmrun): Likewise. (vmsave): Likewise. (pextrb): Add ByteOkIntel. (pinsrb): Likewise. * i386-tbl.h: Regenerated.
2007-10-312007-10-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-7/+17
* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1. (USE_REG_TABLE): Likewise. (USE_MOD_TABLE): Likewise. (USE_RM_TABLE): Likewise. (USE_PREFIX_TABLE): Likewise. (USE_X86_64_TABLE): Likewise. (USE_3BYTE_TABLE): Likewise.
2007-10-262007-10-26 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-11/+75
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New. (MOD_0F51): Likewise. (MOD_0FD7): Likewise. (MOD_0FE7_PREFIX_2): Likewise. (MOD_0F382A_PREFIX_2): Likewise. (MOD_0F71_REG_2): Updated. (MOD_0FF0_PREFIX_3): Likewise. (MOD_62_32BIT): Likewise. (dis386_twobyte): Use MOD_0F51 and MOD_0FD7. (prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2. (mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
2007-10-26* arm-dis.c (print_insn): Check for a symtab that exists but is empty.Nick Clifton2-0/+6
2007-10-24 * po/POTFILES.in: Regenerate.Alan Modra2-0/+5
generated by cgit v1.1 at 2024-12-23 07:19:30 +0000