aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Collapse)AuthorFilesLines
2007-10-152007-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-892/+898
* i386-dis.c (dis386_twobyte): Reformat. (prefix_table): Likewise. (three_byte_table): Likewise.
2007-10-15 * mcore-dis.c (print_insn_mcore): Protect "fprintf" var againstAlan Modra2-28/+36
macro expansion.
2007-10-12gas/H.J. Lu5-1438/+1455
2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_operands): Check the firstxmm0 field in opcode_modifier for instruction with a implicit xmm0 as the first operand. opcodes/ 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add FirstXmm0. * i386-opc.h (FirstXmm0): New. (IsPrefix): Updated. (i386_opcode_modifier): Add firstxmm0. * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0. (blendvps): Likewise. (pblendvb): Likewise. * i386-tbl.h: Regenerated.
2007-10-122007-10-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+6
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
2007-10-10Remove extra white space.H.J. Lu1-1/+1
2007-10-102007-10-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-70/+159
* i386-dis.c (v_mode): Defined as previous one + 1. (w_mode): Likewise. (d_mode): Likewise. (q_mode): Likewise. (t_mode): Likewise. (x_mode): Likewise. (m_mode): Likewise. (cond_jump_mode): Likewise. (loop_jcxz_mode): Likewise. (dq_mode): Likewise. (dqw_mode): Likewise. (f_mode): Likewise. (const_1_mode): Likewise. (stack_v_mode): Likewise. (z_mode): Likewise. (o_mode): Likewise. (dqb_mode): Likewise. (dqd_mode): Likewise. (es_reg): Likewise. (cs_reg): Likewise. (ss_reg): Likewise. (ds_reg): Likewise. (fs_reg): Likewise. (gs_reg): Likewise. (eAX_reg): Likewise. (eCX_reg): Likewise. (eDX_reg): Likewise. (eBX_reg): Likewise. (eSP_reg): Likewise. (eBP_reg): Likewise. (eSI_reg): Likewise. (eDI_reg): Likewise. (al_reg): Likewise. (cl_reg): Likewise. (dl_reg): Likewise. (bl_reg): Likewise. (ah_reg): Likewise. (ch_reg): Likewise. (dh_reg): Likewise. (bh_reg): Likewise. (ax_reg): Likewise. (cx_reg): Likewise. (dx_reg): Likewise. (bx_reg): Likewise. (sp_reg): Likewise. (bp_reg): Likewise. (si_reg): Likewise. (di_reg): Likewise. (rAX_reg): Likewise. (rCX_reg): Likewise. (rDX_reg): Likewise. (rBX_reg): Likewise. (rSP_reg): Likewise. (rBP_reg): Likewise. (rSI_reg): Likewise. (rDI_reg): Likewise. (z_mode_ax_reg): Likewise. (indir_dx_reg): Likewise. (DREX_OC1): Updated. (DREX_NO_OC0): Likewise. (DREX_MASK): Likewise. (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not less than DREX_OC1.
2007-10-08gas/testsuite/H.J. Lu2-2/+8
2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix. * gas/i386/simd-suffix.d: New. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-opcode.d: Updated. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Updated comments for 'Y'. (putop): Don't add 'q' for 'Y' if suffix_always isn't true.
2007-10-08opcodes/:Maciej W. Rozycki2-3/+33
* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition. (mips_cp0_names_r4000): Likewise. (mips_arch_choices): Link to the above as appropriate. gas/testsuite/: * gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic disassembly. * gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic CP0 disassembly. * mips/mips.exp: Run the new tests.
2007-10-08* configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency to be ↵Nick Clifton3-2/+8
../bfd/libbfd.la. * configure: Regenerate.
2007-10-05gas/testsuite/H.J. Lu7-1506/+1536
2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run smx. * gas/i386/smx.d: New. * gas/i386/smx.s: Likewise. opcodes/ 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Add getsec. * i386-gen.c (cpu_flags): Add CpuSMX. * i386-opc.h (CpuSMX): New. (CpuSSSE3): Updated. (i386_cpu_flags): Add cpusmx. * i386-opc.tbl: Add getsec. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2007-10-052007-10-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-31/+36
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)". (prefix_table): Likewise.
2007-10-04gas/testsuite/H.J. Lu2-2/+7
2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/simd.s: Add tests for unpckhpd and unpckhps. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on unpckhpX and unpckhpX.
2007-10-04opcodes/David Daney2-1/+6
2007-10-04 David Daney <ddaney@avtrex.com> * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S registers. gas/testsuite/ 2007-10-04 David Daney <ddaney@avtrex.com> * gas/mips/odd-float.d, gas/mips/odd-float.s: New test. * gas/mips/mips.exp: Run it.
2007-10-042007-10-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+11
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" instead of "movlpX" and "movhlpX", respectively. (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of "movhpX" and "movlhpX", respectively.
2007-10-04* configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS.Nick Clifton5-48/+72
(WIN32LIBADD): Rename to SHARED_LIBADD (SHARED_DEPENDENCIES): New exported variable. (enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds. * Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES. (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD. (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS. * configure: Regenerate. * Makefile.in: Regenerate.
2007-10-04PR gas/5100Nick Clifton2-1/+7
* arc-opc.c (insert_offset): Fix spelling mistake in error message.
2007-10-032007-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-7/+32
* i386-dis.c (OP_REG): Set add to 0 only when needed. (OP_C): Likewise. (OP_D): Likewise. (OP_MMX): Likewise. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise.
2007-10-032007-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-6/+10
* i386-opc.tbl: Update SSE comments.
2007-10-012007-10-01 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+11
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ... (THREE_BYTE_0F7B): This. (dis386_twobyte): Updated. (three_byte_table): Updated comments.
2007-10-01Various CR16 fixesNick Clifton2-3/+8
2007-09-302007-09-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* 386-dis.c (prefix_table): Reformat comment.
2007-09-292007-09-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-579/+620
* 386-dis.c (USE_GROUPS): Renamed to ... (USE_REG_TABLE): This. (USE_OPC_EXT_TABLE): Renamed to ... (USE_MOD_TABLE): This. (USE_OPC_EXT_RM_TABLE): Renamed to ... (USE_RM_TABLE): This. (USE_XXX_TABLE): Reordered. (GRP): Renamed to ... (REG_TABLE): This. (OPC_EXT_TABLE): Renamed to ... (MOD_TABLE): This. (OPC_EXT_RM_TABLE): Renamed to ... (RM_TABLE): This. (GRP_XXX): Renamed to ... (REG_XXX): This. (PREGRP_XXX): Renamed to ... (PREFIX_XXX): This. (OPC_EXT_XXX): Renamed to ... (MOD_XXX): This. (OPC_EXT_RM_XXX): Renamed to ... (RM_XXX): This. (grps): Renamed to ... (reg_table): This (prefix_user_table): Renamed to ... (prefix_table): This (opc_ext_table): Renamed to ... (mod_table): This (opc_ext_rm_table): Renamed to ... (rm_table): This (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-282007-09-28 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1514/+1591
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ... (USE_PREFIX_TABLE): This. (X86_64_SPECIAL): Renamed to ... (USE_X86_64_TABLE): This. (IS_3BYTE_OPCODE): Renamed to ... (USE_3BYTE_TABLE): This. (GRPXXX): Removed. (PREGRPXXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (DIS386): New. (GRP): Likewise. (PREGRP): Likewise. (X86_64_TABLE): Likewise. (THREE_BYTE_TABLE): Likewise. (OPC_EXT_TABLE): Likewise. (OPC_EXT_RM_TABLE): Likewise. (GRP_XXX): Likewise. (PREGRP_XXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (grps): Likewise. (prefix_user_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-272007-09-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+10
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2. (x86_64_table): Likewise. (opc_ext_table): Likewise.
2007-09-27gas/testsuite/gas/H.J. Lu2-96/+268
2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * gas/i386/i386.exp: Run x86-64-opcode-inval and x86-64-opcode-inval-intel. * gas/i386/x86-64-opcode-inval-intel.d: New. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval.s: Likewise. opcodes/ 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * i386-dis.c: Update comments on '{', '}' and '|' to support only AT&T and Intel modes. (X86_64_4...X86_64_27): New. (dis386): Updated. Use X86_64_4...X86_64_21. (dis386_twobyte): Updated. (float_mem): Likewise. (x86_64_table): Add X86_64_4...X86_64_27. (opc_ext_table): Updated. Use X86_64_22 and X86_64_27. (putop): Updated handling of '{', '}' and '|' to support only AT&T and Intel modes.
2007-09-27gas/Kazu Hirata2-1/+5
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB. (last_movec_reg): Change to MBO. * config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB. (m68k_ip): Use MBO instead of MBO. (init_table): Use MBO instead of MBO. Add an entry for mbo. gas/testsuite/ * gas/m68k/fido.s: Add tests for %mbo. * gas/m68k/fido.d: Update accordingly. opcodes/ * m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-26Fix typo in last patch.Jim Wilson2-1/+5
2007-09-26* mt-asm.c (parse_imm16): Reword error message in order to allow it to be ↵Nick Clifton4-5/+17
translated properly. * ia64-gen.c (print_dependency_table): Likewise. * mips-dis.c (print_insn_args): Likewise.
2007-09-26gas/testsuite/Jan Beulich2-2/+11
2007-09-26 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-addr32.d: Adjust expectations. opcodes/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_E_extended): Distinguish rip- and eip- relative addressing. Update used_prefixes based on whether any base or index register was printed.
2007-09-26gas/Jan Beulich4-5/+18
2007-09-26 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (build_modrm_byte): Also check for RegEip when considering IP-relative addressing. gas/testsuite/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * gas/i386/reloc64.s: Adjust for %eip-relative addressing no longer generating errors. * gas/i386/reloc64.d, gas/i386/reloc64.l: Update. * gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix for %eip-realtive addressing case. opcodes/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * i386-opc.h (RegEip): Define. (RegEiz): Adjust. * i386-reg.tbl: Add eip. Mark rip and eip with RegRex64. * i386-tbl.h: Re-generate.
2007-09-26gas/H.J. Lu5-2896/+2915
2007-09-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (output_insn): Use i.tm.opcode_length to check opcode length. opcodes/ 2007-09-25 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (process_i386_opcodes): Process opcode_length. * i386-opc.h (template): Add opcode_length. * 386-opc.tbl: Likewise. * i386-tbl.h: Regenerated.
2007-09-212007-09-21 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+8
* i386-opc.h: Adjust whitespaces.
2007-09-212007-09-21 Dave Brolley <brolley@redhat.com>Dave Brolley2-8/+12
* mep-desc.c: Regenerated.
2007-09-20gas/testsuite/H.J. Lu2-1/+15
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sib.s: Add more eiz tests. * gas/i386/x86-64-sib.s: Add more riz tests. * gas/i386/sib-intel.d: Updated. * gas/i386/sib.d: Likewise. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
2007-09-20gas/H.J. Lu5-12/+64
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed. (set_allow_index_reg): New. (allow_index_reg): Likewise. (md_pseudo_table): Add "allow_index_reg" and "disallow_index_reg". (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for fake index registers. (i386_scale): Updated. (i386_index_check): Support fake index registers. (parse_real_register): Return NULL on eiz/riz if fake index registers aren't allowed. gas/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * gas/i386/i386.exp: Run sib-intel, x86-64-sib and x86-64-sib-intel. * gas/i386/nops-1-i386-i686.d: Updated. * gas/i386/nops-1-i386.d: Likewise. * gas/i386/nops-1.d: Likewise. * gas/i386/nops-2-i386.d: Likewise. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3.d : Likewise. * gas/i386/sib.d: Likewise. * gas/i386/sib.s: Use %eiz in testcases. * gas/i386/sib-intel.d: New. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. * gas/i386/x86-64-sib.s: Likewise. ld/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsld1.dd: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * 386-dis.c (index64): New. (index32): Likewise. (intel_index64): Likewise. (intel_index32): Likewise. (att_index64): Likewise. (att_index32): Likewise. (print_insn): Set index64 and index32. (OP_E_extended): Use index64/index32 for index register for SIB with INDEX == 4. * i386-opc.h (RegEiz): New. (RegRiz): Likewise. * i386-reg.tbl: Add eiz and riz. * i386-tbl.h: Regenerated.
2007-09-19gas/testsuite/gas/H.J. Lu2-3/+10
2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intelok.s: Add tests for memory without base. * gas/i386/intelok.d: Updated. * gas/i386/intelok.e: Likewise. opcodes/ 2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Always display scale for memory.
2007-09-18gas/H.J. Lu4-2/+10
2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (baseindex): Removed. (build_modrm_byte): Check reg_num for RIP register instead of reg_type. (i386_index_check): Likewise. opcodes/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (RegRip): New. * i386-reg.tbl (rip): Use RegRip for reg_num. * i386-tbl.h: Regenerated.
2007-09-17Updated Spanish translationNick Clifton2-296/+418
2007-09-142007-09-14 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-7/+11
* Makefile.am: Run "make dep-am". * Makefile.in: Regenerate.
2007-09-14Add AMD SSE5 supportMichael Meissner7-2403/+7211
2007-09-142007-09-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-16/+19
* i386-dis.c (get_valid_dis386): Take a pointer to disassemble_info. Handle IS_3BYTE_OPCODE. (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
2007-09-122007-09-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+7
* i386-opc.h (CpuUnused): Defined with CpuMax. (OTUnused): Defined with OTMax.
2007-09-12gas/testsuite/Jan Beulich3-0/+36
2007-09-12 Jan Beulich <jbeulich@novell.com> * gas/i386/sse4_1.s, gas/i386/x86-64-sse4_1.s: Add two-operand forms of blendvps, blendvpd, and pblendvb. * gas/i386/sse4_1.d, gas/i386/sse4_1-intel.d, gas/i386/x86-64-sse4_1.d, gas/i386/x86-64-sse4_1-intel.d: Adjust, making last/first operand of blendvps, blendvpd, and pblendvb optional. opcodes/ 2007-09-12 Jan Beulich <jbeulich@novell.com> * i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and pblendvb. * i386-tbl.h: Regenerate.
2007-09-092007-09-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-7/+11
* i386-gen.c (main): Remove the local variable, unused.
2007-09-092007-09-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-12/+17
* Makefile.am: Run "make dep-am". * Makefile.in: Regenerate.
2007-09-09gas/H.J. Lu10-4582/+11782
2007-09-08 H.J. Lu <hongjiu.lu@intel.com> * configure.in (AC_CHECK_HEADERS): Add limits.h. * configure: Regenerated. * config.in: Likewise. * config/tc-i386.c: Include "opcodes/i386-init.h". (_i386_insn): Use i386_operand_type for types. (cpu_arch_flags): Updated to new types with bitfield. (cpu_arch_tune_flags): Likewise. (cpu_arch_isa_flags): Likewise. (cpu_arch): Likewise. (i386_align_code): Likewise. (set_code_flag): Likewise. (set_16bit_gcc_code_flag): Likewise. (set_cpu_arch): Likewise. (md_assemble): Likewise. (parse_insn): Likewise. (process_operands): Likewise. (output_branch): Likewise. (output_jump): Likewise. (parse_real_register): Likewise. (mode_from_disp_size): Likewise. (smallest_imm_type): Likewise. (pi): Likewise. (type_names): Likewise. (pt): Likewise. (pte): Likewise. (swap_2_operands): Likewise. (optimize_imm): Likewise. (optimize_disp): Likewise. (match_template): Likewise. (check_string): Likewise. (process_suffix): Likewise. (check_byte_reg): Likewise. (check_long_reg): Likewise. (check_qword_reg): Likewise. (check_word_reg): Likewise. (finalize_imm): Likewise. (build_modrm_byte): Likewise. (output_insn): Likewise. (disp_size): Likewise. (imm_size): Likewise. (output_disp): Likewise. (output_imm): Likewise. (gotrel): Likewise. (i386_immediate): Likewise. (i386_displacement): Likewise. (i386_index_check): Likewise. (i386_operand): Likewise. (parse_real_register): Likewise. (i386_intel_operand): Likewise. (intel_e09): Likewise. (intel_bracket_expr): Likewise. (intel_e11): Likewise. (cpu_arch_flags_not): New. (cpu_flags_check_x64): Likewise. (cpu_flags_all_zero): Likewise. (cpu_flags_not): Likewise. (i386_cpu_flags_biop): Likewise. (cpu_flags_biop): Likewise. (cpu_flags_match); Likewise. (acc32): New. (acc64): Likewise. (control): Likewise. (reg16_inoutportreg): Likewise. (disp16): Likewise. (disp32): Likewise. (disp32s): Likewise. (disp16_32): Likewise. (anydisp): Likewise. (baseindex): Likewise. (regxmm): Likewise. (imm8): Likewise. (imm8s): Likewise. (imm16): Likewise. (imm32): Likewise. (imm32s): Likewise. (imm64): Likewise. (imm16_32): Likewise. (imm16_32s): Likewise. (imm16_32_32s): Likewise. (operand_type): Likewise. (operand_type_check): Likewise. (operand_type_match): Likewise. (operand_type_register_match): Likewise. (update_imm): Likewise. (set_code_flag): Also update cpu_arch_flags_not. (set_16bit_gcc_code_flag): Likewise. (md_begin): Likewise. (parse_insn): Use cpu_flags_check_x64 to check 64bit support. Use cpu_flags_match to match instructions. (i386_target_format): Update cpu_arch_isa_flags and cpu_arch_tune_flags to i386_cpu_flags type with bitfield. (smallest_imm_type): Check cpu_arch_tune to tune for i486. (match_template): Don't initialize overlap0, overlap1, overlap2, overlap3 and operand_types. (process_suffix): Handle crc32 with 64bit register. (MATCH): Removed. (CONSISTENT_REGISTER_MATCH): Likewise. * config/tc-i386.h (arch_entry): Updated to i386_cpu_flags type. opcodes/ 2007-09-08 H.J. Lu <hongjiu.lu@intel.com> * configure.in (AC_CHECK_HEADERS): Add limits.h. * configure: Regenerated. * config.in: Likewise. * i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and <string.h>. Use xstrerror instead of strerror. (initializer): New. (cpu_flag_init): Likewise. (bitfield): Likewise. (BITFIELD): New. (cpu_flags): Likewise. (opcode_modifiers): Likewise. (operand_types): Likewise. (compare): Likewise. (set_cpu_flags): Likewise. (output_cpu_flags): Likewise. (process_i386_cpu_flags): Likewise. (output_opcode_modifier): Likewise. (process_i386_opcode_modifier): Likewise. (output_operand_type): Likewise. (process_i386_operand_type): Likewise. (set_bitfield): Likewise. (operand_type_init): Likewise. (process_i386_initializers): Likewise. (process_i386_opcodes): Call process_i386_opcode_modifier to process opcode_modifier. Call process_i386_operand_type to process operand_types. (process_i386_registers): Call process_i386_operand_type to process reg_type. (main): Check unused bits in i386_cpu_flags and i386_operand_type. Sort cpu_flags, opcode_modifiers and operand_types. Call process_i386_initializers. * i386-init.h: New. * i386-tbl.h: Regenerated. * i386-opc.h: Include <limits.h>. (CHAR_BIT): Define as 8 if not defined. (Cpu186): Changed to position of bitfiled. (Cpu286): Likewise. (Cpu386): Likewise. (Cpu486): Likewise. (Cpu586): Likewise. (Cpu686): Likewise. (CpuP4): Likewise. (CpuK6): Likewise. (CpuK8): Likewise. (CpuMMX): Likewise. (CpuMMX2): Likewise. (CpuSSE): Likewise. (CpuSSE2): Likewise. (Cpu3dnow): Likewise. (Cpu3dnowA): Likewise. (CpuSSE3): Likewise. (CpuPadLock): Likewise. (CpuSVME): Likewise. (CpuVMX): Likewise. (CpuSSSE3): Likewise. (CpuSSE4a): Likewise. (CpuABM): Likewise. (CpuSSE4_1): Likewise. (CpuSSE4_2): Likewise. (Cpu64): Likewise. (CpuNo64): Likewise. (D): Likewise. (W): Likewise. (Modrm): Likewise. (ShortForm): Likewise. (Jump): Likewise. (JumpDword): Likewise. (JumpByte): Likewise. (JumpInterSegment): Likewise. (FloatMF): Likewise. (FloatR): Likewise. (FloatD): Likewise. (Size16): Likewise. (Size32): Likewise. (Size64): Likewise. (IgnoreSize): Likewise. (DefaultSize): Likewise. (No_bSuf): Likewise. (No_wSuf): Likewise. (No_lSuf): Likewise. (No_sSuf): Likewise. (No_qSuf): Likewise. (No_xSuf): Likewise. (FWait): Likewise. (IsString): Likewise. (RegKludge): Likewise. (IsPrefix): Likewise. (ImmExt): Likewise. (NoRex64): Likewise. (Rex64): Likewise. (Ugh): Likewise. (Reg8): Likewise. (Reg16): Likewise. (Reg32): Likewise. (Reg64): Likewise. (FloatReg): Likewise. (RegMMX): Likewise. (RegXMM): Likewise. (Imm8): Likewise. (Imm8S): Likewise. (Imm16): Likewise. (Imm32): Likewise. (Imm32S): Likewise. (Imm64): Likewise. (Imm1): Likewise. (BaseIndex): Likewise. (Disp8): Likewise. (Disp16): Likewise. (Disp32): Likewise. (Disp32S): Likewise. (Disp64): Likewise. (InOutPortReg): Likewise. (ShiftCount): Likewise. (Control): Likewise. (Debug): Likewise. (Test): Likewise. (SReg2): Likewise. (SReg3): Likewise. (Acc): Likewise. (FloatAcc): Likewise. (JumpAbsolute): Likewise. (EsSeg): Likewise. (RegMem): Likewise. (OTMax): Likewise. (Reg): Commented out. (WordReg): Likewise. (ImplicitRegister): Likewise. (Imm): Likewise. (EncImm): Likewise. (Disp): Likewise. (AnyMem): Likewise. (LLongMem): Likewise. (LongMem): Likewise. (ShortMem): Likewise. (WordMem): Likewise. (ByteMem): Likewise. (CpuMax): New (CpuLM): Likewise. (CpuNumOfUints): Likewise. (CpuNumOfBits): Likewise. (CpuUnused): Likewise. (OTNumOfUints): Likewise. (OTNumOfBits): Likewise. (OTUnused): Likewise. (i386_cpu_flags): New type. (i386_operand_type): Likewise. (i386_opcode_modifier): Likewise. (CpuSledgehammer): Removed. (CpuSSE4): Likewise. (CpuUnknownFlags): Likewise. (Reg): Likewise. (WordReg): Likewise. (ImplicitRegister): Likewise. (Imm): Likewise. (EncImm): Likewise. (Disp): Likewise. (AnyMem): Likewise. (LLongMem): Likewise. (LongMem): Likewise. (ShortMem): Likewise. (WordMem): Likewise. (ByteMem): Likewise. (template): Use i386_cpu_flags for cpu_flags, use i386_opcode_modifier for opcode_modifier, use i386_operand_type for operand_types. (reg_entry): Use i386_operand_type for reg_type. * Makefile.am (HFILES): Add i386-init.h. ($(srcdir)/i386-init.h): New rule. ($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h instead. * Makefile.in: Regenerated.
2007-09-062007-09-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-14/+20
* i386-gen.c (next_field): Updated to take a separator. (process_i386_opcodes): Updated. (process_i386_registers): Likewise.
2007-09-062007-09-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-26/+38
* i386-gen.c (table): Moved ... (main): Here. Call process_copyright to output copyright. (process_copyright): New. (process_i386_opcodes): Take FILE *table. (process_i386_registers): Likewise.
2007-09-062007-09-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-27/+56
* i386-gen.c (table): New. (process_i386_opcodes): Report errno when faied to open i386-opc.tbl. Output opcodes to table. Close i386-opc.tbl before return. (process_i386_registers): Report errno when faied to open i386-reg.tbl. Output opcodes to table. Close i386-reg.tbl before return. (main): Open i386-tbl.h for output. * Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@". * Makefile.in: Regenerated.
2007-09-06gas/H.J. Lu3-37/+22
2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Handle invlpga, vmload, vmrun and vmsave in SVME. (process_suffix): Likewise. gas/testsuite/ 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to allow eax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Correct SVME instructions to allow 32bit register operand in 64bit mode. * i386-tbl.h: Regenerated.
generated by cgit v1.1 at 2024-12-20 01:13:19 +0000