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2000-11-07Last change was actually made by Matthew Green.Dave Brolley1-1/+1
2000-11-072000-11-07 Dave Brolley <brolley@redhat.com>Dave Brolley2-6/+11
* cgen-dis.in (print_insn): All insns which can fit into insn_value must be loaded there in their entirety.
2000-10-20gas/Jakub Jelinek3-12/+53
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p instructions to loose any special insn->architecture mask. * config/tc-sparc.c (v9a_asr_table): Add v9b ASRs. (sparc_md_end, sparc_arch_types, sparc_arch, sparc_elf_final_processing): Handle v8plusb and v9b architectures. (sparc_ip): Handle siam mode operands. Support v9b ASRs (and request v9b architecture if they are used). bfd/ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data, elf32_sparc_object_p, elf32_sparc_final_write_processing): Support v8plusb. * elf64-sparc.c (sparc64_elf_merge_private_bfd_data, sparc64_elf_object_p): Support v9b. * archures.c: Declare v8plusb and v9b machines. * bfd-in2.h: Ditto. * cpu-sparc.c: Ditto. include/opcode/ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. Note that '3' is used for siam operand. opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. (compute_arch_mask): Add v8plusb and v9b machines. (print_insn_sparc): siam mode decoding, accept ASRs up to 25. * opcodes/sparc-opc.c: Support for Cheetah instruction set. (prefetch_table): Add #invalidate.
2000-10-16Change mask for OC to 0xFE00Nick Clifton2-1/+5
2000-10-062000-10-06 Dave Brolley <brolley@redhat.com>Dave Brolley4-7/+13
* fr30-desc.h: Regenerate. * m32r-desc.h: Regenerate. * m32r-ibld.c: Regenerate.
2000-10-05Minor DV table update, minor DV checking bug fix.Jim Wilson3-11/+19
* config/tc-ia64.c (resources_match): Handle IA64_RS_PRr. * ia64-ic.tbl: Update from Intel. * ia64-asmtab.c: Regenerate.
2000-10-042000-10-04 Kazu Hirata <kazu@hxi.com>Kazu Hirata3-3/+8
* ia64-gen.c: Convert C++-style comments to C-style comments. * tic54x-dis.c: Likewise.
2000-09-30* ltconfig, ltmain.sh, libtool.m4: Updated from libtoolAlexandre Oliva1-135/+136
multi-language branch, to work around Solaris' /bin/sh bug. Rebuilt all affected `configure' scripts.
2000-09-29Correct date of checkinHans-Peter Nilsson1-1/+1
2000-09-29 Changes to add dollar prefix to registers for files where user symbolsHans-Peter Nilsson3-38/+110
don't have a leading underscore. Fix formatting. * cris-dis.c (REGISTER_PREFIX_CHAR): New. (format_reg): Add parameter with_reg_prefix. All callers changed. (print_with_operands): Ditto. (print_insn_cris_generic): Renamed from print_insn_cris, add parameter with_reg_prefix. (print_insn_cris_with_register_prefix, print_insn_cris_without_register_prefix, cris_get_disassembler): New. * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
2000-09-22Add missing fpcmp instructions, and add missing fcmp/fpcmp tests.Jim Wilson3-3244/+3310
* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for gt, ge, ngt, and nge. * ia64-asmtab.c: Regenerate.
2000-09-22Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.Jim Wilson8-2602/+2647
gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-09-14Add support for the MIPS32Nick Clifton3-79/+117
2000-09-112000-09-11 Catherine Moore <clm@redhat.com>Catherine Moore2-3/+10
* d30v-opc.c (d30v_operand_t): New operand type Rb2. (d30v_format_tab): Use Rb2 for modinc and moddec.
2000-09-07 * d30v-opc.c (d30v_format_tab): Use format Ra forCatherine Moore2-2/+7
modinc and moddec.
2000-09-06* configure: Rebuilt with new libtool.m4.Alexandre Oliva2-181/+177
2000-09-06Regenerate files using fixed aclocal install.Nick Clifton3-168/+184
2000-09-03Fix time ordering of entriesNick Clifton1-28/+28
2000-09-03Extend comment.Nick Clifton1-1/+1
2000-09-02Increase minor version number (to 2.10.91) to help tools detect the newNick Clifton1-1/+1
ability to support removal of duplciate DWARF@ debug information.
2000-09-02RegenerateNick Clifton2-28/+34
2000-08-31* acinclude.m4: Include libtool and gettext macros from theAlexandre Oliva4-1014/+818
top level. * aclocal.m4, configure: Rebuilt.
2000-08-31In src/gas/ChangeLog:Geoffrey Keating2-10/+146
2000-08-30 Mark Hatle <mhatle@mvista.com> * config/tc-ppc.c (md_parse_option): Recognize -m405. In src/opcodes/ChangeLog: 2000-08-30 Mark Hatle <mhatle@mvista.com> * ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics. (powerpc_opcodes): Add table entries for PPC 405 instructions. Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403 instructions. Added extended mnemonic mftbl as defined in the 405GP manual for all PPCs.
2000-08-302000-08-30 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-77/+71
* tic80-dis.c: Fix formatting.
2000-08-302000-08-29 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-35/+38
* w65-dis.c: Fix formatting.
2000-08-28Fix segfault from last memory-leak fixing patch.Jim Wilson2-1/+7
* ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode call. Change last goto to use failed instead of done.
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley16-360/+726
* cgen-ibld.in (cgen_put_insn_int_value): New function. (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P. (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. * cgen-dis.in (read_insn): New static function. (print_insn): Use read_insn to read the insn into the buffer and set up for disassembly. (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is in the buffer. * fr30-asm.c: Regenerated. * fr30-desc.c: Regenerated. * fr30-desc.h Regenerated. * fr30-dis.c: Regenerated. * fr30-ibld.c: Regenerated. * fr30-opc.c: Regenerated. * fr30-opc.h Regenerated. * m32r-asm.c: Regenerated. * m32r-desc.c: Regenerated. * m32r-desc.h Regenerated. * m32r-dis.c: Regenerated. * m32r-ibld.c: Regenerated. * m32r-opc.c: Regenerated.
2000-08-282000-08-28 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-35/+39
* tic30-dis.c: Fix formatting.
2000-08-262000-08-27 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-65/+73
* sh-dis.c: Fix formatting.
2000-08-242000-08-24 David Edelsohn <dje@watson.ibm.com>Geoffrey Keating2-0/+12
* ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
2000-08-242000-08-24 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-11/+16
* z8k-dis.c: Fix formatting.
2000-08-16Fix 3 DV bugs, and a few minor cleanups.Jim Wilson6-5684/+5878
gas/ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle postincrement modified registers. Handle IA64_OPND_R3_2 addl source registers. (note_register_values): Handle IA64_OPND_R3_2 operands. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc. * gas/ia64/dv-raw-err.l: Likewise. * gas/ia64/dv-waw-err.l: Update sed pattern. * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. include/opcode/ * ia64.h (IA64_OPCODE_POSTINC): New. opcodes/ * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete break, mov-immediate, nop. * ia64-opc-f.c: Delete fpsub instructions. * ia64-opc-m.c: Add POSTINC to all instructions with postincrement address operand. Rewrite using macros to avoid long lines. * ia64-opc.h (POSTINC): Define. * ia64-asmtab.c: Regenerate.
2000-08-15Fix file corrupted before initial checkin.Jim Wilson2-1/+35
* ia64-ic.tbl: Add missing entries.
2000-08-092000-08-08 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+5
* i860-dis.c (print_br_address): Change third argument from int to long.
2000-08-09gas:Jason Eckhardt1-3/+3
2000-08-08 Jason Eckhardt <jle@cygnus.com> * config/tc-i860.h: Rework completely for BFD_ASSEMBLER. (i860_fix_info): New enum. (MD_APPLY_FIX3): Define. (WORKING_DOT_WORD): Define. (TC_HANDLES_FX_DONE): Define. (DIFF_EXPR_OK): Define. (LISTING_HEADER): Define. (TARGET_FORMAT): Select target format based on endian flag. (TARGET_BYTES_BIG_ENDIAN): Default to little endian. (target_big_endian): Add external declaration. * config/tc-i860.c: All existing code reworked completely. Other new code shown below. (SYNTAX_SVR4): Define. (target_warn_expand): New variable. (md_shortopts): Declare and define (-Qy, -Qn, and -V options). (md_longopts): Declare and define with new options (-EL, -EB, and -mwarn-expand). (md_show_usage): New function. (md_operand): New function. (obtain_reloc_for_imm16): New function. (md_apply_fix3): New function. (tc_gen_reloc): New function. include: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * opcode/i860.h: Small formatting adjustments. opcode: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * i860-dis.c (print_br_address): Change third argument from int to long. bfd: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * elf32-i860.c (elf32_i860_howto_table): Updated some fields.
2000-08-07 * ia64-dis.c (print_insn_ia64): Get byte skip count correctRichard Henderson2-1/+13
for MLI templates. Handle IA64_OPND_TGT64.
2000-08-06 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.Denis Chertykov2-43/+94
Change return type from void to int. Check the combination of operands, return 1 if valid. Fix to avoid BUF overflow. Report undefined combinations of operands in COMMENT. Report internal errors to stderr. Output the adiw/sbiw constant operand in both decimal and hex. (print_insn_avr): Disassemble ldd/std with displacement of 0 as ld/st. Check avr_operand () return value, handle invalid combinations of operands like unknown opcodes.
2000-08-042000-08-04 Ben Elliston <bje@redhat.com>Ben Elliston5-0/+1406
* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files. * cgen.sh: Likewise.
2000-08-02Fix memory leaks for IA-64 opcode idescs.Jim Wilson2-0/+5
gas/ * config/tc-ia64.c (emit_one_bundle): Call ia64_free_opcode before ia64_find_opcode. (md_assemble): Likewise. opcodes/ * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-07-31Minor formatting fixesNick Clifton8-158/+145
2000-07-292000-07-28 Ben Elliston <bje@redhat.com>Ben Elliston5-157/+299
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New. (run-cgen, stamp-m32r, stamp-fr30): New targets. * Makefile.in: Regenerate. * configure.in: Add --enable-cgen-maint option. * configure: Regenerate.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+4
* Makefile.am (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+22
* i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * configure.in: New bits for bfd_i860_arch. * configure: Regenerated.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt5-167/+454
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
2000-07-262000-07-26 Dave Brolley <brolley@redhat.com>Dave Brolley4-7/+20
* cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned. (cgen_hw_lookup_by_num): Ditto. (cgen_operand_lookup_by_name): Ditto. (print_address): Ditto. (print_keyword): Ditto. * cgen-dis.c (hash_insn_array): Mark unused parameters with ATTRIBUTE_UNUSED. * cgen-asm.c (hash_insn_array): Mark unused parameters with ATTRIBUTE_UNUSED. (cgen_parse_keyword): Ditto.
2000-07-20Revert spurious unrelated changes from last commit. Oops.Hans-Peter Nilsson2-4/+0
2000-07-20 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.Hans-Peter Nilsson10-15/+2286
(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo. (cris-dis.lo, cris-opc.lo): New rules. * Makefile.in: Rebuild. * configure.in (bfd_cris_arch): New target. * configure: Rebuild. * disassemble.c (ARCH_cris): Define. (disassembler): Support ARCH_cris. * cris-dis.c, cris-opc.c: New files. * po/POTFILES.in, po/opcodes.pot: Regenerate.
2000-07-11 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.Jakub Jelinek2-2/+7
Reported by Bill Clarke <llib@computer.org>.
2000-07-10Fix a date.Alan Modra1-1/+1
2000-07-09* ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.Geoffrey Keating2-1/+6
Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
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