Age | Commit message (Collapse) | Author | Files | Lines |
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(powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
entries to suit PPC440.
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* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr. Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
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* configure.in (ALL_LINGUAS): Add fi.
* configure: Regenerate.
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* Makefile.am (NO_WERROR): Define.
* warning.m4: New file
* acinclude.m4: Include warning.m4.
* configure.in: Invoke AM_BINUTILS_WARNINGS.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/
* Makefile.in: Regenerate.
binutils/
* Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
* configure.in: Include ../bfd/warning.m4 contents.
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
gas/
* Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
* acinclude.m4: Include ../bfd/warning.m4.
* configure.in: Invoke AM_BINUTILS_WARNINGS.
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
gprof/
* Makefile.am (NO_WERROR): Define.
* acinclude.m4: Include ../bfd/warning.m4.
* configure.in: Invoke AM_BINUTILS_WARNINGS.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
ld/
* Makefile.am (NO_WERROR): Define. Use instead of -Wno-error.
* configure.in: Include ../bfd/warning.m4 contents.
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/
* Makefile.am (NO_WERROR): Define.
* configure.in: Invoke AM_BINUTILS_WARNINGS.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* configure: Regenerate.
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2005-04-01 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
visible operands in Intel mode. The first operand of monitor is
%rax in 64-bit mode.
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2005-04-01 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add rdtscp.
opcodes/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
easier future additions.
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* configure: Regenerate.
* config.in: Ditto.
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2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
x86-64-segment and x86-64-inval-seg for x86-64.
* gas/i386/intel.d: Expect movw for moving between memory and
segment register.
* gas/i386/naked.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/opcode.s: Use movw for moving between memory and
segment register.
* gas/i386/x86-64-opcode.s: Likewise.
* : Likewise.
* gas/i386/inval-seg.l: New.
* gas/i386/inval-seg.s: New.
* gas/i386/segment.l: New.
* gas/i386/segment.s: New.
* gas/i386/x86-64-inval-seg.l: New.
* gas/i386/x86-64-inval-seg.s: New.
* gas/i386/x86-64-segment.l: New.
* gas/i386/x86-64-segment.s: New.
include/opcode/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Don't allow the `l' suffix for moving
moving between memory and segment register. Allow movq for
moving between general-purpose register and segment register.
opcodes/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (SEG_Fixup): New.
(Sv): New.
(dis386): Use "Sv" for 0x8c and 0x8e.
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address, and add code to test this new option.
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* cris-dis.c (print_with_operands): Use ~31L for long instead
of ~31.
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* mmix-opc.c (O): Revert the last change.
(Z): Likewise.
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* mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
(Z): Likewise.
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latter confuses xgettext into thinking that it is a C printf formating directive,
which prevents proper translation.
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for compatibility with gcc.
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BOOKE.
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... >"
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* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
wfi, yield.
opcodes:
* arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev,
wfe, wfi, yield.
gas/testsuite:
* gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
* gas/arm/arm.exp: Run it.
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* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
and ARM_ARCH_V6ZKT2.
opcodes:
* arm-dis.c (arm_opcodes): Document %E and %V.
Add entries for v6T2 ARM instructions:
bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
(print_insn_arm): Add support for %E and %V.
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* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
(powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
(SPRG_MASK): Delete.
(XSPRG_MASK): Mask off extra bits now part of sprg field.
(powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
mfsprg4..7 after msprg and consolidate.
gas/testsuite
* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
* gas/ppc/booke.d: Likewise.
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(print_insn_vax): Decode function entry mask.
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* opcodes/arc-dis.c:Add enum a4_decoding_class.
(dsmOneArcInst): Use the enum values for the decoding class
Remove redundant case in the switch for decodingClass value 11
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2005-03-02 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
accesses.
(parse_register): Allow cr8...15 in all modes.
gas/testsuite/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* gas/i386/cr-err.[ls]: New.
* gas/i386/crx.[ds]: New.
* gas/i386/i386.exp: Run new tests.
opcodes/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
accesses.
(OP_C): Consider lock prefix in non-64-bit modes.
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* crx-dis.c (make_instruction): Warning fix.
* frv-asm.c: Regenerate.
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all of its fields are initialised before they are used.
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* arc-ext.h: Likewise.
* cgen-opc.c: Likewise.
* ia64-gen.c: Likewise.
* maxq-dis.c: Likewise.
* ns32k-dis.c: Likewise.
* w65-dis.c: Likewise.
* ia64-asmtab.c: Regenerate.
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* Makefile.in: Regenerate.
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* dis-buf.c (perror_memory): Use sprintf_vma to print out
address.
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2005-02-07 Jim Blandy <jimb@redhat.com>
* cgen-opc.scm: Don't load fixup.scm here. (See corresponding
changes in the opcodes directory.)
opcodes/ChangeLog:
2005-02-07 Jim Blandy <jimb@redhat.com>
* Makefile.am (CGEN): Load guile.scm before calling the main
application script.
* Makefile.in: Regenerated.
* cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
Simply pass the cgen-opc.scm path to ${cgen} as its first
argument; ${cgen} itself now contains the '-s', or whatever is
appropriate for the Scheme being used.
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* gettext.m4: Only set ENABLE_NLS when gettext is present.
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2005-01-31 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_operands): Also handle alloc without first
input being ar.pfs.
gas/testsuite/
2005-01-31 Jan Beulich <jbeulich@novell.com>
* gas/ia64/pseudo.[ds]: New.
* gas/ia64/ia64.exp: Run new test.
opcodes/
2005-01-31 Jan Beulich <jbeulich@novell.com>
* ia64-gen.c (NELEMS): Define.
(shrink): Generate alias with missing second predicate register when
opcode has two outputs and these are both predicates.
* ia64-opc-i.c (FULL17): Define.
(ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
here to generate output template.
(TBITCM, TNATCM): Undefine after use.
* ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
first input. Add ld16 aliases without ar.csd as second output. Add
st16 aliases without ar.csd as second input. Add cmpxchg aliases
without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
ar.ccv as third/fourth inputs. Consolidate through...
(CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
* ia64-asmtab.c: Regenerate.
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* gettext.m4: Don't use NONE as a default for CATOBJEXT.
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2004-12-10 Alexandre Oliva <aoliva@redhat.com>
* elf32-frv.c (elf32_frv_relocate_section): Force local binding
for TLSMOFF.
* reloc.c: Add R_FRV_TLSMOFF.
* elf32-frv.c (elf32_frv_howto_table): Likewise.
(frv_reloc_map, frv_reloc_type_lookup): Map it.
(elf32_frv_relocate_section): Handle it.
(elf32_frv_check_relocs): Likewise.
* libbfd.h, bfd-in2.h: Rebuilt.
2004-11-26 Alexandre Oliva <aoliva@redhat.com>
* elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
when given an undefweak TLS symbol. Fix constant TLS PLT entries
such that they return the constant in gr9.
(_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
symbols.
(_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
too, such that they shrink on relaxation.
(elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
(_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
if we can guarantee the use of 16-bit constants.
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
Introduce TLS support for FR-V FDPIC.
* reloc.c: Add TLS relocations.
* elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
(elf32_frv_rel_tlsdesc_value_howto): New.
(elf32_frv_rel_tlsoff_howto): New.
(frv_reloc_map): Add new mappings.
(struct frvfdpic_elf_link_hash_table): Add pointer to summary
reloc information.
(frvfdpic_dynamic_got_plt_info): New.
(frvfdpic_plt_tls_ret_offset): New.
(ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
(struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members.
(struct _frvfdpic_dynamic_got_plt_info): Likewise.
(FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
section as local.
(struct frvfdpic_relocs_info): Add TLS fields.
(frvfdpic_relocs_info_hash): Warning clean up.
(frvfdpic_relocs_info_find): Initialize tlsplt_entry.
(frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
(FRVFDPIC_TLS_BIAS): Define.
(tls_biased_base): New.
(_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
relocations.
(frv_reloc_type_lookup): Likewise.
(frvfdpic_info_to_howto_rel): Likewise.
(elf32_frv_relocate_section): Likewise.
(_frv_create_got_section): Create the PLT section here.
(elf32_frvfdpic_create_dynamic_sections): Not here.
(_frvfdpic_count_nontls_entries): Move out of...
(_frvfdpic_count_got_plt_entries): ... here.
(_frvfdpic_count_tls_entries): Likewise. Add TLS support.
(_frvfdpic_count_relocs_fixups): Likewise. Add relaxation
support.
(_frvfdpic_relax_tls_entries): New.
(_frvfdpic_compute_got_alloc_data): Add TLS support.
(_frvfdpic_get_tlsdesc_entry): New.
(_frvfdpic_assign_got_entries): Add TLS support.
(_frvfdpic_assign_plt_entries): Likewise.
(_frvfdpic_reset_got_plt_entries): New.
(_frvfdpic_size_got_plt): Move out of...
(elf32_frvfdpic_size_dynamic_sections): ... here.
(_frvfdpic_relax_got_plt_entries): New.
(elf32_frvfdpic_relax_section): New.
(elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
(elf32_frv_check_relocs): Add TLS support.
(bfd_elf32_bfd_relax_section): Define for FDPIC.
* libbfd.h, bfd-in2.h: Rebuilt.
cpu/ChangeLog:
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* frv.cpu: Add support for TLS annotations in loads and calll.
* frv.opc (parse_symbolic_address): New.
(parse_ldd_annotation): New.
(parse_call_annotation): New.
(parse_ld_annotation): New.
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
Introduce TLS relocations.
(parse_d12, parse_s12, parse_u12): Likewise.
(parse_uhi16): Likewise. Fix constant checking on 64-bit host.
(parse_call_label, print_at): New.
gas/ChangeLog:
* config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
2004-12-10 Alexandre Oliva <aoliva@redhat.com>
* config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* cgen.c (gas_cgen_parse_operand): Handle
CGEN_PARSE_OPERAND_SYMBOLIC.
* config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
(frv_force_relocation): Likewise. Fix handling of PIC
relocations.
(md_apply_fix3): Likewise.
include/elf/ChangeLog:
2004-12-10 Alexandre Oliva <aoliva@redhat.com>
* frv.h: Add R_FRV_TLSMOFF.
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* frv.h: Add TLS relocations.
include/opcode/ChangeLog:
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* cgen.h (enum cgen_parse_operand_type): Add
CGEN_PARSE_OPERAND_SYMBOLIC.
ld/testsuite/ChangeLog:
* ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
* ld-frv/tls.exp: Likewise.
2004-11-26 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/tls-3.s: New.
* ld-frv/tls-static-3.d: New.
* ld-frv/tls-dynamic-3.d: New.
* ld-frv/tls-pie-3.d: New.
* ld-frv/tls-shared-3.d: New.
* ld-frv/tls-relax-static-3.d: New.
* ld-frv/tls-relax-dynamic-3.d: New.
* ld-frv/tls-relax-pie-3.d: New.
* ld-frv/tls-relax-shared-3.d: New.
* ld-frv/tls.exp: Run the new tests.
* ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
* ld-frv/tls-relax-dynamic-2.d: Likewise.
* ld-frv/tls-relax-initial-shared-2.d: Likewise.
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* ld-frv/tls-1-dep.s: New.
* ld-frv/tls-1-shared.lds: New.
* ld-frv/tls-1.s: New.
* ld-frv/tls-2.s: New.
* ld-frv/tls-dynamic-1.d: New.
* ld-frv/tls-dynamic-2.d: New.
* ld-frv/tls-initial-shared-2.d: New.
* ld-frv/tls-pie-1.d: New.
* ld-frv/tls-relax-dynamic-1.d: New.
* ld-frv/tls-relax-dynamic-2.d: New.
* ld-frv/tls-relax-initial-shared-2.d: New.
* ld-frv/tls-relax-pie-1.d: New.
* ld-frv/tls-relax-shared-1.d: New.
* ld-frv/tls-relax-shared-2.d: New.
* ld-frv/tls-relax-static-1.d: New.
* ld-frv/tls-shared-1-fail.d: New.
* ld-frv/tls-shared-1.d: New.
* ld-frv/tls-shared-2.d: New.
* ld-frv/tls-static-1.d: New.
* ld-frv/tls.exp: New.
* ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
* ld-frv/fdpic-pie-2.d: Likewise.
* ld-frv/fdpic-pie-6.d: Likewise.
* ld-frv/fdpic-pie-7.d: Likewise.
* ld-frv/fdpic-pie-8.d: Likewise.
* ld-frv/fdpic-shared-1.d: Likewise.
* ld-frv/fdpic-shared-2.d: Likewise.
* ld-frv/fdpic-shared-3.d: Likewise.
* ld-frv/fdpic-shared-4.d: Likewise.
* ld-frv/fdpic-shared-5.d: Likewise.
* ld-frv/fdpic-shared-6.d: Likewise.
* ld-frv/fdpic-shared-7.d: Likewise.
* ld-frv/fdpic-shared-8.d: Likewise.
* ld-frv/fdpic-shared-local-2.d: Likewise.
* ld-frv/fdpic-shared-local-8.d: Likewise.
* ld-frv/fdpic-static-1.d: Likewise.
* ld-frv/fdpic-static-2.d: Likewise.
* ld-frv/fdpic-static-6.d: Likewise.
* ld-frv/fdpic-static-7.d: Likewise.
* ld-frv/fdpic-static-8.d: Likewise.
opcodes/ChangeLog:
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
* frv-asm.c: Rebuilt.
* frv-desc.c: Rebuilt.
* frv-desc.h: Rebuilt.
* frv-dis.c: Rebuilt.
* frv-ibld.c: Rebuilt.
* frv-opc.c: Rebuilt.
* frv-opc.h: Rebuilt.
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* gettext.m4: Only fall back to ../intl/ when it's present.
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* mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
* mips-dis.c: Ditto.
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* mips-dis.c (no_aliases): New disassembly option flag.
(set_default_mips_dis_options): Init no_aliases to zero.
(parse_mips_dis_option): Handle no-aliases option.
(print_insn_mips): Ignore table entries that are aliases
if no_aliases is set.
(print_insn_mips16): Ditto.
* mips-opc.c (mips_builtin_opcodes): Add initializer column for
new pinfo2 member and add INSN_ALIAS initializers as needed. Also
move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
* mips16-opc.c (mips16_opcodes): Ditto.
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