| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 1997-12-16 | * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit | Fred Fish | 1 | -0/+8 | |
| PC relative offset forms before the 15 bit forms. An assembler command line option now chooses the default. PR 12927 | |||||
| 1997-12-16 | note that the fix for --enable-shared is not the real way it needs to | Brendan Kehoe | 1 | -0/+3 | |
| be done; libtool.m4 needs a change of some sort instead | |||||
| 1997-12-16 | * mips-opc.c: Add many missing r5900 instructions. | Jeff Law | 1 | -0/+6 | |
| 1997-12-16 | fix tab problem | Michael Meissner | 1 | -1/+1 | |
| 1997-12-16 | Set new d30v opcode flag bits in appropriate instructions. | Michael Meissner | 1 | -0/+7 | |
| 1997-12-15 | * configure: Only build libopcodes shared if --enable-shared's value | Brendan Kehoe | 1 | -0/+6 | |
| was `yes', or was set to `*opcodes*'. * aclocal.m4: Likewise. so `--enable-shared=libstdc++' doesn't result in building a shared libopcodes only an interim fix, this is the incorrect formal approach since alocal.m4 itself is generated via what's in devo/libtool/libtool.m4; we need to find a way to have that somehow hold the real fix. | |||||
| 1997-12-15 | * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants. | Jeff Law | 2 | -191/+214 | |
| Also move 'P' handling out of vr5400 sanitized code so it can be used on r5900 too. | |||||
| 1997-12-13 | * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change. | Fred Fish | 2 | -72/+82 | |
| (tic80_opcodes): Reorder table entries to put the 32 bit PC relative offset forms before the 15 bit forms, to default to the long forms. PR 12927 | |||||
| 1997-12-12 | Renamed v850eq -> v850ea | Nick Clifton | 2 | -165/+169 | |
| 1997-12-12 | * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. | Richard Henderson | 1 | -0/+4 | |
| 1997-12-11 | sanitization fixes. (files not mentioned, fences misspelled) | Felix Lee | 1 | -1/+8 | |
| 1997-12-09 | Test/fix d10v RTE instruction. | Andrew Cagney | 1 | -0/+4 | |
| 1997-12-08 | Removed disasm_symaddr() function and switched detection of Arm vs Thumb | Nick Clifton | 2 | -16/+48 | |
| mode over to state of info->symbol, ala the MIPS port. | |||||
| 1997-12-02 | Add support for displaying disassembled Thumb instrucitons. | Nick Clifton | 3 | -9/+847 | |
| 1997-12-02 | Display nop pseudo ops alongside equivalent disassembly. | Nick Clifton | 2 | -3/+140 | |
| 1997-12-01 | Mon Dec 1 12:25:57 1997 Andreas Schwab ↵ | Ian Lance Taylor | 1 | -0/+7 | |
| <schwab@issan.informatik.uni-dortmund.de> * m68k-opc.c (btst): Change Dd@s to Dd;b. * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q', and 'v' as operand types. | |||||
| 1997-12-01 | * m68k-opc.c: Add argument for lpstop. From Olivier Carmona | Ian Lance Taylor | 3 | -34/+65 | |
| <olivier.carmona@di.epfl.ch>. * m68k-dis.c (print_insn_m68k): Handle special case of lpstop, which has a two word opcode with a one word argument. | |||||
| 1997-11-20 | * sh-dis.c (print_insn_shx): Recognize all sh4 additions. | Richard Henderson | 1 | -0/+8 | |
| * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4. (ftrv): Slay the cut-and-paste monster. * tc-sh.c (parse_reg): Properly quote for fv4. pr14044 | |||||
| 1997-11-18 | * d10v-dis.c (print_operand): | Joern Rennecke | 1 | -0/+5 | |
| Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. Addendum for PR 13985. | |||||
| 1997-11-18 | * include/opcode/d10v.h (OPERAND_FLAG): Split into: | Joern Rennecke | 1 | -0/+13 | |
| (OPERAND_FFLAG, OPERAND_CFLAG) . * opcodes/d10v-opc.c (OPERAND_FLAG): Split into: (OPERAND_FFLAG, OPERAND_CFLAG) . (FSRC): Split into: (FFSRC, CFSRC). * gas/config/tc-d10v.c (parallel_ok, find_opcode): Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. Fix for PR 13985. | |||||
| 1997-11-12 | mips-opc.c (sync,cache): These are 3900 insns. | Gavin Romig-Koch | 2 | -2/+6 | |
| 1997-11-12 | sh-opc.h (sh_table): Remove ftst/nan. | Joern Rennecke | 1 | -0/+4 | |
| Fixes gcc/13330. | |||||
| 1997-11-03 | make vr5400 disassembly work; fix bugs in some vr5400 insns | Ken Raeburn | 3 | -11/+21 | |
| 1997-11-02 | Correct tx49 sanitation. | Gavin Romig-Koch | 1 | -1/+10 | |
| 1997-10-29 | * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): | Gavin Romig-Koch | 3 | -14/+59 | |
| Add tx49 insns and configury. | |||||
| 1997-10-28 | * mips-opc.c (ffc, ffs): Fix mask. | Ken Raeburn | 2 | -2/+6 | |
| 1997-10-28 | Add eit_vb, int_s, and int_m control registers | Michael Meissner | 1 | -0/+7 | |
| 1997-10-28 | Duh. Check in the vr5400 stuff from the directory that doesn't have | Ken Raeburn | 3 | -0/+167 | |
| it sanitized out this time... | |||||
| 1997-10-28 | added vr5400 stuff, fixed "not" mask | Ken Raeburn | 2 | -2/+7 | |
| 1997-10-23 | Removed C++ ism | Nick Clifton | 1 | -0/+4 | |
| 1997-10-23 | * sparc-opc.c: Add wr & rd for v9a asr's. | Richard Henderson | 2 | -1/+32 | |
| * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's. (v9a_asr_reg_names): New variable. Patch from David Miller <davem@vger.rutgers.edu>. | |||||
| 1997-10-23 | * sparc-opc.c (v9notv9a): New insn type. | Richard Henderson | 2 | -16/+24 | |
| (IMPDEP): Move to the end to not conflict with edge8 et al. Patch from David Miller <davem@vger.rutgers.edu>. | |||||
| 1997-10-17 | opcodes/mips-opc.c (bnezl,beqzl): Mark these as also tx39. | Gavin Romig-Koch | 2 | -2/+6 | |
| 1997-10-16 | opcodes/mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. | Gavin Romig-Koch | 2 | -1/+7 | |
| 1997-10-14 | New dummy function for symbol_at_address_func field of disassemble_info | Nick Clifton | 2 | -5/+39 | |
| structure. Add code to use this field in v850 disassembly. | |||||
| 1997-10-10 | Fixed bug extracting displacement from a JR instruction. | Nick Clifton | 1 | -0/+4 | |
| 1997-10-08 | opcodes/mips-opc.c: Three op mult is not an ISA insn. | Gavin Romig-Koch | 2 | -2/+11 | |
| 1997-10-08 | opcodes/mips-opc.c: Fix formatting. | Gavin Romig-Koch | 2 | -8/+22 | |
| 1997-10-02 | Use symbolic names rather than numbers for higher value system registers. | Nick Clifton | 1 | -0/+7 | |
| 1997-10-02 | Fixed disassembler to use processor type when decoding instructions. | Nick Clifton | 2 | -11/+33 | |
| 1997-10-01 | * configure.in: Use a diversion to set enable_shared before the | Ian Lance Taylor | 1 | -0/+11 | |
| arguments are parsed. * configure: Rebuild. | |||||
| 1997-09-24 | * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. | Ian Lance Taylor | 2 | -6/+14 | |
| 1997-09-24 | * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. | Ian Lance Taylor | 2 | -3/+5 | |
| 1997-09-24 | * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr | Ian Lance Taylor | 2 | -3/+45 | |
| for mcf5200. | |||||
| 1997-09-24 | * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. | Ian Lance Taylor | 1 | -9/+10 | |
| * aclocal.m4: Rebuild with new libtool. * configure: Rebuild. | |||||
| 1997-09-21 | Fixed sanitization bugs. | Nick Clifton | 1 | -4/+0 | |
| 1997-09-20 | Removed v850eq sanitization. | Nick Clifton | 1 | -34/+2 | |
| 1997-09-19 | Correct ordering of args for cmov insn. | Andrew Cagney | 2 | -1/+7 | |
| 1997-09-18 | * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. | David Edelsohn | 2 | -0/+7 | |
| 1997-09-18 | sanitization fixes. typoes, missing fences, "start" instead of "end", etc. | Felix Lee | 2 | -12/+4 | |
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