| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-06-30 | MIPS: Fix XPA base and Virtualization ASE instruction handling | Maciej W. Rozycki | 3 | -24/+53 |
| 2017-06-30 | MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation | Maciej W. Rozycki | 2 | -3/+20 |
| 2017-06-29 | [ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over options | Anton Kolesov | 2 | -14/+11 |
| 2017-06-29 | [ARC] Fix handling of cpu=... disassembler option value | Anton Kolesov | 2 | -8/+14 |
| 2017-06-28 | [AArch64] Add dot product support for AArch64 to binutils | Tamar Christina | 5 | -179/+265 |
| 2017-06-28 | [ARM] Assembler and disassembler support Dot Product Extension | Jiong Wang | 2 | -0/+10 |
| 2017-06-28 | MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support | Maciej W. Rozycki | 5 | -73/+152 |
| 2017-06-23 | RISC-V: Fix SLTI disassembly | Andrew Waterman | 2 | -2/+7 |
| 2017-06-21 | x86: CET v2.0: Update incssp and setssbsy | H.J. Lu | 4 | -25/+41 |
| 2017-06-21 | x86: CET v2.0: Rename savessp to saveprevssp | H.J. Lu | 4 | -3/+9 |
| 2017-06-21 | x86: CET v2.0: Update NOTRACK prefix | H.J. Lu | 2 | -8/+13 |
| 2017-06-19 | Prevent address violation when attempting to disassemble a corrupt score binary. | Nick Clifton | 2 | -0/+6 |
| 2017-06-17 | Regen rx-decode.c | Alan Modra | 2 | -712/+716 |
| 2017-06-15 | i386-dis: Check valid bnd register | H.J. Lu | 2 | -0/+16 |
| 2017-06-15 | Prevent address violation problem when disassembling corrupt aarch64 binary. | Nick Clifton | 2 | -0/+9 |
| 2017-06-15 | Fix address violation when disassembling a corrupt RL78 binary. | Nick Clifton | 3 | -411/+424 |
| 2017-06-15 | Prevent invalid array accesses when disassembling a corrupt bfin binary. | Nick Clifton | 2 | -4/+12 |
| 2017-06-14 | Fix seg-fault when trying to disassemble a corrupt score binary. | Nick Clifton | 2 | -1/+7 |
| 2017-06-14 | Don't use print_insn_XXX in GDB | Yao Qi | 7 | -5/+26 |
| 2017-06-14 | Fix address violation problems when disassembling a corrupt RX binary. | Nick Clifton | 3 | -20/+37 |
| 2017-06-14 | [opcodes][arm] Remove bogus entry added by accident in former patch | Andre Vieira | 2 | -2/+4 |
| 2017-06-01 | S/390: idte/ipte fixes | Andreas Krebbel | 1 | -5/+2 |
| 2017-05-30 | [ARC] Allow CPU to be enforced via disassemble_info options | Anton Kolesov | 2 | -26/+114 |
| 2017-05-30 | S/390: Fix instruction types of csdtr and csxtr | Andreas Krebbel | 2 | -2/+6 |
| 2017-05-30 | S/390: Add missing operand to tb instruction | Andreas Krebbel | 1 | -1/+1 |
| 2017-05-30 | S/390: Add ipte/idte variants with optional operands | Andreas Krebbel | 2 | -1/+4 |
| 2017-05-30 | S/390: Improve error checking for optional operands | Andreas Krebbel | 2 | -3/+16 |
| 2017-05-24 | Move print_insn_XXX to an opcodes internal header | Yao Qi | 70 | -68/+198 |
| 2017-05-24 | Use disassemble.c:disassembler select rl78 disassembler | Yao Qi | 2 | -1/+10 |
| 2017-05-24 | Refactor disassembler selection | Yao Qi | 2 | -15/+31 |
| 2017-05-22 | x86: Add NOTRACK prefix support | H.J. Lu | 6 | -10652/+10726 |
| 2017-05-19 | binutils: support for the SPARC M8 processor | Jose E. Marchesi | 3 | -14/+266 |
| 2017-05-18 | Don't compare boolean values against TRUE or FALSE | Alan Modra | 5 | -14/+20 |
| 2017-05-17 | S/390: Fix arch level of pckmo instruction. | Andreas Krebbel | 1 | -1/+1 |
| 2017-05-15 | MIPS16e2: Add MIPS16e2 ASE support | Maciej W. Rozycki | 3 | -16/+198 |
| 2017-05-15 | MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding | Maciej W. Rozycki | 2 | -1/+6 |
| 2017-05-12 | MIPS16/opcodes: Make the handling of BREAK and SDBBP consistent | Maciej W. Rozycki | 2 | -1/+9 |
| 2017-05-12 | MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases | Maciej W. Rozycki | 3 | -14/+22 |
| 2017-05-10 | [ARC] Object attributes. | Claudiu Zissulescu | 4 | -29/+37 |
| 2017-05-04 | RISC-V: Fix disassemble for c.li, c.andi and c.addiw | Kito Cheng | 2 | -0/+5 |
| 2017-05-02 | RISC-V: Change CALL macro to use ra as the temporary address register | Michael Clark | 2 | -1/+6 |
| 2017-05-02 | MIPS16/opcodes: Keep the LSB of PC-relative offsets in disassembly | Maciej W. Rozycki | 2 | -3/+9 |
| 2017-05-02 | Fix value in comment of disassembled ARM type A opcodes. | Bernd Edlinger | 2 | -2/+6 |
| 2017-04-25 | [ARC] Enhance enter/leave mnemonics. | Claudiu Zissulescu | 4 | -4/+44 |
| 2017-04-25 | [ARC] Prefer NOP instead of MOV 0,0 | Claudiu Zissulescu | 2 | -3/+7 |
| 2017-04-25 | MIPS16/opcodes: Add `-M no-aliases' disassembler option help text | Maciej W. Rozycki | 2 | -0/+8 |
| 2017-04-25 | MIPS16/opcodes: Annotate instruction aliases | Maciej W. Rozycki | 2 | -5/+13 |
| 2017-04-24 | Fix snafu in aarch64 opcodes debugging statement. | Tamar Christina | 2 | -2/+7 |
| 2017-04-22 | PowerPC VLE insn set additions | Alan Modra | 2 | -7/+19 |
| 2017-04-21 | opcodes: mark SPARC RETT instructions as v6notv9. | Jose E. Marchesi | 2 | -7/+11 |
