aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Collapse)AuthorFilesLines
2002-11-082002-11-07 Aldy Hernandez <aldyh@redhat.com>Aldy Hernandez2-1/+2
* ppc-opc.c (EVUIMM_4): Change bit size to 32. (EVUIMM_2): Same. (EVUIMM_8): Same.
2002-11-072002-11-07 Aldy Hernandez <aldyh@redhat.com>Aldy Hernandez2-2/+7
* ppc-opc.c (EVUIMM_4): Change bit size to 32. (EVUIMM_2): Same.
2002-11-07Convert ia64-gen to use getopt(). Add standard GNU options plus --srcdir.Nick Clifton12-2203/+2292
Convert Makefile.am to pass --srcdir to ia64-gen. Fix compile time warnings.
2002-11-072002-11-06 Aldy Hernandez <aldyh@redhat.com>Aldy Hernandez2-4/+8
* opcodes/ppc-opc.c: Change RD to RS for evmerge*.
2002-10-23Add conditional/unconditional branch classification.Nick Clifton2-19/+26
2002-10-13 * m68hc11-dis.c (print_insn): Treat bitmask and branch operandsStephane Carrez2-49/+55
at the end.
2002-09-30[include/opcode/]Richard Sandiford3-21/+176
* mips.h: Update comment for new opcodes. (OP_MASK_VECBYTE, OP_SH_VECBYTE): New. (OP_MASK_VECALIGN, OP_SH_VECALIGN): New. (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New. (CPU_VR4120, CPU_VR5400, CPU_VR5500): New. (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags. Don't match CPU_R4111 with INSN_4100. [opcodes/] * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'. (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. * mips-opc.c (V1): Include INSN_4111 and INSN_4120. (N411, N412, N5, N54, N55): New convenience defines. (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes. Change dmadd16 and madd16 from V1 to N411.
2002-09-26 /gas/ChangeLogThiemo Seufer2-1/+8
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16 capable configuration. (macro_build): Check for MIPS16 capability, not for actual MIPS16 code generation. (mips_ip): Likewise. /gas/testsuite/ChangeLog * gas/mips/mips-jalx.d: New file, check jalx assembly. * gas/mips/mips-jalx.s: Likewise. * gas/mips/mips-no-jalx.l: Likewise. * gas/mips/mips-no-jalx.s: Likewise. * gas/mips/mips16-jalx.d: Likewise. * gas/mips/mips16-jalx.s: Likewise. * gas/mips/mips.exp: Add new tests. /opcodes/ChangeLog: * mips-dis.c (print_insn_mips): Always allow disassembly of 32-bit jalx opcode.
2002-09-24Updated German translation.Nick Clifton2-45/+100
2002-09-21 * Makefile.am: Run "make dep-am".Alan Modra4-141/+148
* Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2002-09-20Allow CRFS and CRFD operands to accept CR register namesNick Clifton2-2/+7
2002-09-17 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.Alan Modra2-32/+86
Convert functions to K&R format.
2002-09-13Fix Book-E opcodesNick Clifton2-272/+396
2002-09-12 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.Alan Modra2-1/+6
2002-09-11Update translationsNick Clifton2-47/+100
2002-09-04Do not insert non-BookE32 instructions into the hash table if the target cpuNick Clifton2-2/+6
is the BookE32. (case 107575)
2002-09-04Have objdump's --help switch document PPC -M options.Nick Clifton3-0/+24
2002-09-04The BookE implementations of the TLBWE and TLBRE instructions do not take anyNick Clifton2-3/+8
arguments.
2002-09-02Remove redundant references to V850EA architecture.Nick Clifton2-17/+4
2002-09-02 * arc-opc.c: Include bfd.h.Alan Modra2-1/+7
(arc_get_opcode_mach): Subtract off base bfd_mach value.
2002-08-30 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.Alan Modra3-5/+7
* mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
2002-08-28Add TMS320C4x supportNick Clifton7-1/+707
2002-08-22opcodes: Fix definition of "in rd,imm16" opcode.Nick Clifton4-5/+12
gas: Adjust ptr variable also in "case 0" case.
2002-08-192002-08-19 Elena Zannoni <ezannoni@redhat.com>Elena Zannoni3-7/+623
From matthew green <mrg@redhat.com> * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and `-mefs'. Turn off AltiVec for E500 and efs. (print_insn_powerpc): Don't print an AltiVec instruction if the dialect is not efs. * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2, insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions for extracting pmrn/evld/evstd/etc operands. (CRB, CRFD, CRFS, DC, RD): New instruction fields. (CT): Make this equal to RD + 1. (PMRN): New operand. (RA): Update. (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands. (WS): Update. (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL. (ISEL, ISEL_MASK): New instruction form and mask for ISEL. (XISEL, XISEL_MASK): New instruction form and mask for ISEL. (CTX, CTX_MASK): New instruction form and mask for context cache instructions. (UCTX, UCTX_MASK): New instruction form and mask for user context cache instructions. (XC, XC_MASK, XUC, XUC_MASK): New instruction forms. (CLASSIC): New define. (PPCESPE): New define. (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New defines for integer select, cache control, branch locking, power management, cache locking and machine check APU instructions, respectively. (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul, efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt, efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf, efsctui, efsctsi, efsctsiz, efsctuf, efsctsf, evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb, evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor, evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi, evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi, evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts, evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh, evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx, evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat, evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx, evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe, evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox, evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv, evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq, evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui, evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg, evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq, evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf, evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi, evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi, evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw, evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw, evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw, evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw, evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw, evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa, evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian, evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf, evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian, evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi, evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi, evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw, evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw, evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa, evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia, evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan, evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw, evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw, evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex instructions. (rfmci): New machine check APU instruction. (isel): New integer select APU instructino. (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls, dcbtstlse, dcblc, dcblce): New cache control APU instructions. (mtspefscr, mfspefscr): New instructions. (mfpmr, mtpmr): New performance monitor APU instructions. (savecontext): New context cache APU instructions. (bblels, bbelr): New branch locking APU instructions. (bblels, bbelr): New instructions. (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-13 * m68hc11-opc.c: Update call operand to accept the page definition.Stephane Carrez2-16/+30
Identify instructions that are branches and calls to generate a RL_JUMP relocation.
2002-08-13 * m68hc11-dis.c (print_insn): Take into account 68HC12 memoryStephane Carrez2-7/+86
banks and fix disassembling of call instruction. (print_indexed_operand): New param to tell whether it was an indirect addressing operand (for disassembling call).
2002-08-09Updated Swedish translationNick Clifton2-47/+67
2002-08-09* config/tc-mips.c (macro): Handle a register plus a 16-bitMaciej W. Rozycki2-2/+5
immediate offset in "dla" and "la" expansions. * gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when $0 is source. * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as aliases to "daddiu" and "addiu".
2002-07-30Updated TranslationsNick Clifton2-63/+51
2002-07-25New translationsNick Clifton6-221/+363
2002-07-24Update Spanish and Swedish translationsNick Clifton4-151/+176
2002-07-23 * Makefile.am: Run "make dep-am".Alan Modra4-65/+76
* Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2002-07-23oops - omitted from previous deltaNick Clifton1-0/+423
2002-07-23update translations.Nick Clifton5-76/+140
2002-07-19Add IP2k GAS and OPCODES support.Nick Clifton13-54/+5352
2002-07-172002-07-17 David Mosberger <davidm@hpl.hp.com>H.J. Lu3-570/+587
* ia64-opc-b.c (bWhc): New macro. (mWhc): Ditto. (OpPaWhcD): Ditto. (ia64_opcodes_b): Correct patterns for indirect call instructions to use 3-bit "wh" field. * ia64-asmtab.c: Regnerate.
2002-07-09 * config/tc-mips.c (macro_build): Handle MIPS16 insns.Thiemo Seufer3-6/+13
(mips_ip): Likewise. * mips.h (INSN_MIPS16): New define. * mips-dis.c (mips_isa_type): Add MIPS16 insn handling. * mips-opc.c (I16): New define. (mips_builtin_opcodes): Make jalx an I16 insn.
2002-06-182002-06-18 Dave Brolley <brolley@redhat.com>Dave Brolley14-2/+17242
* po/POTFILES.in: Add frv-*.[ch]. * disassemble.c (ARCH_frv): New macro. (disassembler): Handle bfd_arch_frv. * configure.in: Support frv_bfd_arch. * Makefile.am (HFILES): Add frv-*.h. (CFILES): Add frv-*.c (ALL_MACHINES): Add frv-*.lo. (CLEANFILES): Add stamp-frv. (FRV_DEPS): New variable. (stamp-frv): New target. (frv-asm.lo): New target. (frv-desc.lo): New target. (frv-dis.lo): New target. (frv-ibld.lo): New target. (frv-opc.lo): New target. (frv-*.[ch]): New files.
2002-06-18 * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.Ben Elliston3-2/+7
* Makefile.in: Regenerate.
2002-06-08 * a29k-dis.c: Replace CONST with const.Alan Modra6-15/+24
* h8300-dis.c: Likewise. * m68k-dis.c: Likewise. * or32-dis.c: Likewise. * sparc-dis.c: Likewise.
2002-06-04bfd:Jason Thorpe3-66/+59
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-05-312002-05-31 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2-8/+13
* mips-opc.c: Clean up a few whitespace issues, and sort a few entries understanding that 'x' follows 'w' in the alphabet.
2002-05-31[ opcodes/ChangeLog ]Chris Demetriou2-46/+54
2002-05-31 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-opc.c: Add support for SB-1 MDMX subset and extensions. [ gas/testsuite/ChangeLog ] 2002-05-31 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/sb1-ext-mdmx.s: New file. * gas/mips/sb1-ext-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
2002-05-31 * Makefile.am: Run "make dep-am".Alan Modra4-5/+10
* Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2002-05-31[ gas/ChangeLog ]Chris Demetriou3-8/+161
2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-30Fix for invalid conflict warning.Tom Rix2-2/+7
2002-05-28Add DLX targetNick Clifton7-1/+573
2002-05-25 * Makefile.am (sh-dis.lo): Don't put make commands in deps.Alan Modra5-8/+19
* Makefile.in: Regenerate. * arc-dis.c: Use #include "" instead of <> for local header files. * m68k-dis.c: Likewise.
2002-05-23Fix handling of BLX instruction to conform to Operations definition in theNick Clifton1-23/+23
ARM ARM.
2002-05-22 * Makefile.am (sh-dis.lo): Compile with @archdefs@.Joern Rennecke3-2/+7
* Makefile.in: regenerate.
generated by cgit v1.1 at 2024-12-15 04:48:34 +0000