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2014-09-22Ignore MOD field for control/debug register moveH.J. Lu2-32/+19
2014-09-16NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.Kuan-Lin Chen4-1842/+2327
2014-09-15Add support for MIPS R6.Andrew Bennett4-362/+786
2014-09-10Properly handle suffix for iret and sysretH.J. Lu2-21/+59
2014-09-03[PATCH/AArch64] Generic support for all system registers using mrs and msrJiong Wang3-101/+28
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang10-223/+2033
2014-08-26MIPS: Make the CODE10 operand code consistent between ISAsMaciej W. Rozycki2-5/+11
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki2-0/+8
2014-08-21MIPS/opcodes: Remove microMIPS 48-bit LI instructionMaciej W. Rozycki2-4/+5
2014-08-19This patch set mainly aims at improving the S/390 disassembler'sAndreas Arnez2-134/+184
2014-08-14opcodes: blackfin: convert ad-hoc ints to bfd_booleanMike Frysinger2-21/+31
2014-08-14opcodes: blackfin: simplify decode_CC2stat_0 logicMike Frysinger2-41/+11
2014-08-14opcodes: blackfin: avoid duplicate memory readsMike Frysinger2-6/+10
2014-08-13opcodes: blackfin: push down global stateMike Frysinger2-43/+83
2014-08-13opcodes: blackfin: do not force align the PCMike Frysinger2-1/+14
2014-08-13opcodes: blackfin: handle memory read errorsMike Frysinger2-19/+45
2014-07-29[MIPS] Rename COPROC related macrosMatthew Fortune3-134/+142
2014-07-29[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensionsMatthew Fortune3-24/+34
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar8-5910/+9526
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar8-5277/+12632
2014-07-22Add support for AVX512VL versions of AVX512CD instructions.Ilya Tocar3-0/+214
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar7-4322/+20266
2014-07-20or1k: add missing l.msync, l.psync and l.psync instructions.Stefan Kristiansson6-48/+95
2014-07-08Fix disasm of vmovsd/vmovss with different length values.Ilya Tocar2-2/+7
2014-07-04Rename configure.in to configure.acAlan Modra4-2/+8
2014-07-04Use modern AC_INIT in configure.inAlan Modra5-45/+41
2014-07-01Add support for the AVR Tiny series of microcontrollers.Barney Stratford2-2/+26
2014-06-26Fix a compile time warning on 32-bit hosts.Philippe De Muyter2-3/+8
2014-06-12Whitespace fixes for cpu/or1k.opcAlan Modra9-136/+140
2014-06-10Only print prefixes before fwaitH.J. Lu2-2/+10
2014-06-07Allow both signed and unsigned fields in PowerPC cmpli insnAlan Modra2-5/+12
2014-06-05Make it easy to make --disable-werror the default for both binutils and gdbJoel Brobecker4-4/+16
2014-06-03Fix the disassembly of MSP430 extended index addressing mode.Nick Clifton2-11/+16
2014-06-02This fixes a thinko in the LEON support recently added to the assembler.Eric Botcazou2-2/+7
2014-05-20Remove unnecessary header from m68k-dis.cAlan Modra2-2/+4
2014-05-09Properly display extra data/address size prefixesH.J. Lu2-55/+22
2014-05-08or1k: add support for l.swa/l.lwa atomic instructionsStefan Kristiansson6-46/+122
2014-05-07Add MIPS r3 and r5 support.Andrew Bennett3-2/+55
2014-05-07Fix an issue with "Rearrange MIPS INSN* masks" patch.Andrew Bennett2-3/+5
2014-05-05Properly handle multiple opcode prefixesH.J. Lu2-114/+161
2014-05-02Use sigsetjmp/siglongjmp in opcodesH.J. Lu11-18/+110
2014-05-01Handle prefixes before fwaitH.J. Lu2-1/+12
2014-04-26Regenerate files for openrisk -> or1k changeAlan Modra2-9/+9
2014-04-23Add support for the MIPS eXtended Physical Address (XPA) ASE.Andrew Bennett3-4/+40
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson20-3851/+5200
2014-04-04Add support for Intel SGX instructionsIlya Tocar7-3852/+3910
2014-04-02Add new sign-extension instructions to moxie portAnthony Green2-2/+7
2014-03-26[AArch64 disassembler] Add missing checks of undefine encodings onYufeng Zhang2-3/+14
2014-03-20Fix memory size for gather/scatter instructionsIlya Tocar5-27/+60
2014-03-19This patch adds support for the hyperprivileged registers %hstick_offsetJose E. Marchesi2-1/+6
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