aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Expand)AuthorFilesLines
2016-05-23[ARC] Update instruction type and delay slot info.Claudiu Zissulescu4-113/+144
2016-05-23[ARC] Add XY registers, update neg instruction.Claudiu Zissulescu2-0/+7
2016-05-23[ARC] Rename "class" named attributes.Claudiu Zissulescu3-5/+11
2016-05-23tic54x: rename typedef of struct symbol_Trevor Saunders3-7/+12
2016-05-19Correct "Fix powerpc subis range"Alan Modra2-1/+5
2016-05-19Fix powerpc subis rangeAlan Modra2-12/+26
2016-05-18MIPS/opcodes: Correct mixed MIPS16 and microMIPS disassemblyMaciej W. Rozycki2-17/+28
2016-05-13Accept valid one byte signed and unsigned values for the IMM8 operand.Peter Bergner2-1/+5
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune3-2/+11
2016-05-10Enable Intel RDPID instruction.Alexander Fomin7-5308/+5365
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme2-4/+11
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme2-1/+29
2016-05-09opcodes,gas: sparc: fix mnemonic of faligndataiJose E. Marchesi2-4/+7
2016-05-09Regenerate configureAlan Modra1-7/+10
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu3-7/+66
2016-05-03Fix generation of AArhc64 instruction table.Szabolcs Nagy5-6/+17
2016-04-28Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton5-1332/+1239
2016-04-23Skip if size of bfd_vma is smaller than address sizeH.J. Lu2-0/+14
2016-04-20update many old style function definitionsTrevor Saunders21-141/+98
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess3-23/+246
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess2-0/+23
2016-04-15Regenerate Makefile.in/aclocal.m4 automake 1.11.6H.J. Lu3-45/+104
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess3-0/+42
2016-04-14opcodes/arc: Move instruction length logic to new functionAndrew Burgess2-13/+50
2016-04-13Fix disassembly of the V850's LD.BU instruction.Nick Clifton2-2/+8
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu5-437/+543
2016-04-12Update ARC instruction data-base.Claudiu Zissulescu2-0/+10
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu5-142/+554
2016-04-11MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassemblyMaciej W. Rozycki2-2/+9
2016-04-07arc/nps400: Add new instructionsAndrew Burgess3-0/+73
2016-04-07gas/arc: Handle multiple arc_opcode chains for same mnemonicAndrew Burgess2-1/+35
2016-04-05arc/nps400: Add additional instructionsAndrew Burgess3-2/+241
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu4-1064/+1077
2016-04-05[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang2-6/+22
2016-03-31opcodes: Fix date in ChangeLog entryAndrew Burgess1-1/+1
2016-03-31opcodes/arc/nps: Fix some operand flagsAndrew Burgess2-2/+7
2016-03-31enable -Wwrite-strings for gasTrevor Saunders1-2/+18
2016-03-30opcodes/arc: Comment and whitespace fixes in opcode tableAndrew Burgess2-6/+13
2016-03-30[ARC] Cleanup AUX register names.Claudiu Zissulescu2-27/+13
2016-03-29[ARC] Fix typo in extension instruction name.Claudiu Zissulescu2-1/+5
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu5-6/+130
2016-03-24More -Wstack-usage warnings: opcodes/aarch64-*Jan Kratochvil3-7/+11
2016-03-24sparc: reorder wr instructions in sparc_opcodes to fix diagnosticsJose E. Marchesi2-6/+11
2016-03-22Add -Wstack-usage to the gcc warning flags list, but only if using a sufficie...Nick Clifton2-1/+23
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess3-0/+173
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess2-25/+31
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess2-0/+8
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess2-3/+4
2016-03-21Remove use of alloca.Nick Clifton2-2/+3
2016-03-18Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.Nick Clifton2-1/+7
generated by cgit v1.1 at 2024-11-30 16:02:28 +0000