Age | Commit message (Expand) | Author | Files | Lines |
2015-03-17 | Add znver1 processor | Ganesh Gopalasubramanian | 7 | -5283/+5339 |
2015-03-13 | MIPS: Fix constraint issues with the R6 beqc and bnec instructions | Andrew Bennett | 2 | -2/+7 |
2015-03-13 | Add support for MIPS R6 evp and dvp instructions. | Andrew Bennett | 2 | -0/+8 |
2015-03-10 | S/390: Add more IBM z13 instructions | Andreas Krebbel | 3 | -0/+30 |
2015-03-10 | [AARCH64] Remove Load/Store register (unscaled immediate) alias. | Jiong Wang | 5 | -490/+439 |
2015-03-03 | [ARM] Skip private symbol when doing objdump | Jiong Wang | 2 | -2/+9 |
2015-02-25 | [SH] Fix clrs, sets, pref insn arch memberships. | Oleg Endo | 2 | -3/+10 |
2015-02-23 | Adds a space between the operands of the RL78's MOV instruction for consisten... | Vinay | 3 | -8/+14 |
2015-02-19 | Wrap a few opcodes headers in extern "C" for C++ | Pedro Alves | 2 | -0/+12 |
2015-02-11 | Fixes a problem with the RL78 disassembler which would incorrectly disassembl... | Nick Clifton | 3 | -93/+93 |
2015-02-10 | opcodes/microblaze: Rename 'or', 'and', 'xor' to avoid C++ conflict | Pedro Alves | 3 | -4/+13 |
2015-01-29 | NDS32: Set branch instruction to relaxable. | Kuan-Lin Chen | 1 | -1/+2 |
2015-01-28 | FT32 initial support | Alan Modra | 9 | -0/+292 |
2015-01-28 | NDS32/opcodes: Add new system registers. | Kuan-Lin Chen | 2 | -2/+14 |
2015-01-16 | S/390: Add support for IBM z13. | Andreas Krebbel | 5 | -530/+1203 |
2015-01-02 | Regenerate Makeile.in file for copyright update | Alan Modra | 1 | -1/+1 |
2015-01-02 | ChangeLog rotatation and copyright year update | Alan Modra | 265 | -1150/+1168 |
2014-12-27 | Limit moxie sto/ldo offsets to 16 bits | Anthony Green | 3 | -16/+22 |
2014-12-24 | Add mul.x and umul.x instructions to moxie port | Anthony Green | 2 | -9/+14 |
2014-12-16 | Add in a JALRC alias and fix the NAL instruction. | Matthew Fortune | 2 | -1/+7 |
2014-12-12 | Add zex instructions for moxie port | Anthony Green | 2 | -2/+6 |
2014-12-06 | Add Visium support to opcodes | Eric Botcazou | 9 | -0/+886 |
2014-11-30 | Power4 should treat mftb as extended mfspr mnemonic | Alan Modra | 2 | -6/+11 |
2014-11-28 | Remove broken nios2 assembler dwim support. | Sandra Loosemore | 2 | -4/+9 |
2014-11-28 | Don't deprecate powerpc mftb insn | Alan Modra | 2 | -7/+15 |
2014-11-24 | Update libtool.m4 from GCC trunk | H.J. Lu | 2 | -2/+6 |
2014-11-17 | Add AVX512VBMI instructions | Ilya Tocar | 8 | -5445/+5730 |
2014-11-17 | Add AVX512IFMA instructions | Ilya Tocar | 8 | -5512/+5677 |
2014-11-17 | Add pcommit instruction | Ilya Tocar | 7 | -5262/+10575 |
2014-11-17 | Add clwb instruction | Ilya Tocar | 7 | -5260/+5310 |
2014-11-06 | Add mach parameter to nios2_find_opcode_hash. | Sandra Loosemore | 2 | -3/+9 |
2014-11-03 | Import updated translations supplied by the Translation Project. | Nick Clifton | 2 | -146/+372 |
2014-10-31 | MIPS: Add Octeon 3 support | Naveen H.S | 3 | -3/+29 |
2014-10-29 | Updated/new translations provided by the Translations Project. | Nick Clifton | 2 | -270/+1059 |
2014-10-23 | Refactoring/cleanup of nios2 opcodes and assembler code. | Sandra Loosemore | 3 | -451/+580 |
2014-10-21 | ppc: enable msgclr and msgsnd on Power8 | Jan Beulich | 2 | -2/+6 |
2014-10-17 | opcodes, elf: annotate instructions with HWCAP2_VIS3B. | Jose E. Marchesi | 2 | -12/+13 |
2014-10-17 | opcodes: fix several misplaced hwcap entries. | Jose E. Marchesi | 2 | -13/+18 |
2014-10-15 | Bump bfd version. | Tristan Gingold | 2 | -10/+14 |
2014-10-09 | This is a series of patches that add support for the SPARC M7 cpu to | Jose E. Marchesi | 3 | -1441/+1507 |
2014-09-22 | Ignore MOD field for control/debug register move | H.J. Lu | 2 | -32/+19 |
2014-09-16 | NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt. | Kuan-Lin Chen | 4 | -1842/+2327 |
2014-09-15 | Add support for MIPS R6. | Andrew Bennett | 4 | -362/+786 |
2014-09-10 | Properly handle suffix for iret and sysret | H.J. Lu | 2 | -21/+59 |
2014-09-03 | [PATCH/AArch64] Generic support for all system registers using mrs and msr | Jiong Wang | 3 | -101/+28 |
2014-09-03 | [PATCH/AArch64] Implement LSE feature | Jiong Wang | 10 | -223/+2033 |
2014-08-26 | MIPS: Make the CODE10 operand code consistent between ISAs | Maciej W. Rozycki | 2 | -5/+11 |
2014-08-22 | ARM/opcodes: Fix negative hexadecimal offset disassembly | Maciej W. Rozycki | 2 | -0/+8 |
2014-08-21 | MIPS/opcodes: Remove microMIPS 48-bit LI instruction | Maciej W. Rozycki | 2 | -4/+5 |
2014-08-19 | This patch set mainly aims at improving the S/390 disassembler's | Andreas Arnez | 2 | -134/+184 |