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1995-06-16 * mpw-config.in: Add sh and i386 configs, remove sparc config.Stan Shebs2-2/+18
* sh-opc.h: Add copyright.
1995-05-25Unsanitize SH3 support.Jim Wilson1-22/+0
1995-05-24Wed May 24 14:16:08 1995 Steve Chamberlain <sac@slash.cygnus.com>Steve Chamberlain2-4/+30
* sh-opc.h: Added bsrf and braf.
1995-05-18Bunch of changes from Richard Earnshaw for generic bi-endian ARM aout targets.Ken Raeburn1-10/+12
Details in change logs.
1995-04-24 * sh-opc.c (sh_nibble_type, sh_arg_type): remove trailing , fromJason Molenda1-0/+5
enum list. some native cc's barf on this (and K&R says it's naughty)
1995-04-19Fix April 17th change.Michael Meissner1-0/+5
1995-04-18* mips-dis.c (print_insn_little_mips): Cast return value from bfd_getl32 fromKen Raeburn1-0/+37
bfd_vma to unsigned long, because _print_insn_mips expects an unsigned long, and that might be fewer words of argument storage (e.g., if bfd_vma is long long on a 32-bit machine). (print_insn_big_mips): Likewise with bfd_getb32 value. (_print_insn_mips): Now static.
1995-04-10always keep MPW support filesStan Shebs1-8/+2
1995-04-10Merge MPW ChangeLog with generic ChangeLogStan Shebs2-36/+25
1995-04-07 * arc-dis.c (print_insn): New parameter `big_p'. Callers updated.David Edelsohn3-94/+220
Call arc_get_opcode_mach to map bfd mach number to opcode value. (print_insn_*): Pass bfd mach number, not opcode version. * arc-opc.c (arc_get_opcode_mach): New function.
1995-03-14Changes from Klaus Kaempf:Ken Raeburn2-397/+530
* alpha-opc.h (OSF_ASMCODE): define print pal-code names as defined in App C of the Alpha Architecture Reference Manual * alpha-dis.c: cleaned up output print stylized code forms as defined in App A.4.3 of the Alpha Architecture Reference Manual
1995-03-12arc-dis.c (print_insn): Put "+ 4" of relative addresses back. Oops.David Edelsohn1-1/+7
1995-03-08* m68k-dis.c (BREAK_UP_BIG_DECL): Make secondary array static and const.Ken Raeburn1-0/+4
(reg_names): Now const. (print_insn_arg): Arrays cacheFieldName and names now const. (print_indexed): Array scales now const.
1995-03-08Avoid bogus assumption that the two parts of the split m68k opcode tableKen Raeburn2-67/+130
are going to be adjacent in memory.
1995-03-08 * arc-dis.c (print_insn_arc_base): Split into big and little fns.David Edelsohn1-0/+16
(print_insn_arc_{host,graphics,audio}): Likewise. (print_insn): Add prototype. Delete "+ 4" addition to relative branch address. (arc_get_disassembler): New arg `big_p'. Return little or big print fn accordingly. * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once. (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order. (arc_opval_supported): Likewise. * disassemble.c (disassembler): Pass big endian flag to arc_get_disassembler.
1995-03-07 * ppc-opc.c: Sort recently added instructions by minor opcodeIan Lance Taylor1-0/+5
number within major opcode number.
1995-03-06 * hppa-dis.c: Include libhppa.h.Jeff Law1-0/+8
1995-02-21 * Makefile.in (ALL_MACHINES): Add w65-dis.o.Peter Schauer1-0/+4
1995-02-17* arc-dis.c (arc_get_disassembler): Change argument to int,David Edelsohn1-0/+7
one of bfd_mach_arc_xxx. All callers updated.
1995-02-16 * mips-opc.c: Add r4650 mul instruction.Ian Lance Taylor2-0/+5
1995-02-15 * mips-opc.c: Add uld and usd macros for unaligned double load andIan Lance Taylor2-0/+26
store.
1995-02-10(arc_get_disassembler): Renamed from arc_disassembler.David Edelsohn2-3/+3
1995-02-10 * disassemble.c (disassembler, case bfd_arch_arc): CallDavid Edelsohn2-1/+21
arc_disassembler to get disassembler routine.
1995-02-10Lotsa arc stuff.David Edelsohn1-0/+20
1995-02-10 * arc-opc.c (MULTSHIFT operand): Delete.David Edelsohn1-69/+184
(UNSIGNED, SATURATION): New operands. (mac, mul, mul64, mulu64): New insns. (ext. asl, asr, lsr, ror): Only available on host and graphics cpus. (padc, padd, pmov, pand, psbc, psub, swap): New insns. (host,graphics,audio extended and auxiliary regs): Define. (ss, sc, mh, ml): New suffixes. (arc_opcode_supported, arc_opval_supported): New functions. (insert_multshift, extract_multshift): Deleted.
1995-02-10 * arc-dis.c (print_insn_arc): Rename to print_insn and make static.David Edelsohn1-11/+95
New argument `cpu', pass it to arc_opcode_init_tables. Document byte order dependencies. Ignore unsupported insns. (arc_disassembler): New function. (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics, print_insn_arc_audio): New functions.
1995-02-09 * i960-dis.c (struct tabent, struct sparse_tabent): Change theStan Shebs1-0/+5
signed char fields to shorts, more portable.
1995-02-09 * i960-dis.c (struct tabent, struct sparse_tabent): Declare theStan Shebs2-0/+919
char fields as signed chars, since they may have negative values. Fixes PR 6290.
1995-02-06* i386-dis.c (dis386_twobyte): Add cpuid, From Charles HannumJ.T. Conklin1-0/+12
(mycroft@netbsd.org).
1995-01-30tipoIan Lance Taylor1-1/+1
1995-01-26 * ppc-opc.c: Changes based on patch from David EdelsohnIan Lance Taylor2-41/+229
<edelsohn@npac.syr.edu>. (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of SPR. (FXM_MASK): Define. (insert_tbr): New static function. (extract_tbr): New static function. (XFXFXM_MASK, XFXM): Define. (XSPRBAT_MASK, XSPRG_MASK): Define. (powerpc_opcodes): Add instructions to access special registers by name. Add mtcr and mftbu.
1995-01-16 * configure.in: Add W65 support.Steve Chamberlain4-0/+673
* disassemble.c: Likewise. * w65-opc.h, w65-dis.c: New files.
1995-01-04 * mpw-config.in (archname): Compute from the config.Stan Shebs2-8/+17
(BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
1994-12-29 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bitSteve Chamberlain1-0/+14
immediates.
1994-12-20 * mips-opc.c: Add dli as a synonym for li.Ian Lance Taylor2-6/+14
1994-12-19 * arc-opc.c (insertion fns): Pass pointer to value's table entry.David Edelsohn3-0/+1199
All uses changed. (extraction fns): Insn argument now array of two words. Return pointer to value's table entry. All uses changed. (arc_opcode_lookup_suffix): Exported for arc-dis.c. (insert_multshift, extract_multshift): New fns. (arc_operands): Add support for cache bypass suffix. Add support for predefined aux regs. Modifier bits moved to flags field. (arc_opcodes): Likewise. Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed. New insn rlc. Update to syntax in programmer's manual. (arc_reg_names): Fix typo in lp_count. Add predefined aux regs. (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache bypass. (arc_opcode_init_tables): New argument to indicate cpu type. (insert_reg): Handle predefined aux regs. (extract_reg): Likewise. (lookup_register): New fn. * arc-dis.c (arc_condition_codes): Deleted. (print_insn_arc): Handle insns with 32 bit immediate constants better. Clean up modifier handling. Handle predefined aux regs.
1994-12-19don't sanitize arc files that have already been deletedKen Raeburn1-1/+1
1994-12-08alpha, mips, m68k fixesKen Raeburn1-0/+20
1994-12-06Clean the sh3 stuff out the right way.Steve Chamberlain1-1/+1
1994-12-06Switch r3 to scratch register, r0 to stack register.Michael Tiemann1-1/+0
Other misc changes before beta shipment to customer.
1994-11-30Initial ARC support.David Edelsohn1-2/+36
1994-11-26Add changes from customer since last work.Michael Tiemann1-24/+33
1994-11-25remove sh3 stuff.Steve Chamberlain1-0/+24
1994-11-25*** empty log message ***Michael Tiemann1-1/+1
1994-11-25Rename r16 files to rce, and fix some more .Sanitize typos.Michael Tiemann4-21/+21
1994-11-24*** empty log message ***Michael Tiemann1-2/+2
1994-11-24Fix .Sanitize scrips so that r16 is truly scrubbed out.Michael Tiemann1-0/+34
Also, report errors if any traces of sanitize remain after sanitizing.
1994-11-24Safely check in r16 targets for binutils.Michael Tiemann4-46/+300
1994-11-24 * disasseble.c (disassebler): Cope with little endian SH.Steve Chamberlain1-0/+157
1994-11-24 * sh-opc.h (mov.l gbr): Get direction right.Steve Chamberlain2-0/+367
* sh-dis.c (print_insn_shx): New function. (print_insn_shl, print_insn_sh): Call print_insn_shx to print opcodes with right byte order.