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* gas/ppc/booke.s (rfci, wrtee, wrteei, mfdcrx, mfdcr, mtdcrx,
mtdcr, msync, dcba, mbar): New BookE tests.
* gas/ppc/booke.d: Update for new BookE tests.
[opcodes/ChangeLog]
* ppc-opc.c (MO): New macro for MO field of mbar instruction.
(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
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* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
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* cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
for the length when extracting the base part of the insn.
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* opcodes/arm-dis.c (print_insn_arm): Add 'I' case.
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opcodes/po/POTFILES.in
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Run "make dep-am"
* Makefile.in: Regenerate.
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* cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
calls to cgen_get_insn_value and cgen_put_insn_value calls.
(extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
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* Makefile.in: Regenerate.
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(my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
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* openrisc-desc.c: Likewise.
* openrisc-ibld.c: Likewise.
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for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
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Jason Eckhardt <jle@redhat.com>
* mips-dis.c: Add support for bfd_mach_mipsisa32 and
bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
bfd_mach_mips64.
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* arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
* arc-ext.c: Likewise.
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(forgotten in last checkin)
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(LS): Define.
(insert_ds): Complain if not a multiple of 4.
(XSYNC): Define.
(XSYNC_MASK): Define.
(powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
"slbmfee". Modify "sync" to use XSYNC_MASK and LS.
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GCC warnings.
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* d30v.h: Fix declaration of reg_name_cnt.
* d10v.h: Fix declaration of d10v_reg_name_cnt.
* arc.h: Add prototypes from opcodes/arc-opc.c.
For opcodes:
* tic54x-dis.c: Add unused attributes where needed.
* z8k-dis.c (output_instr): Add unused attribute.
* h8300-dis.c: Add missing prototypes.
(bfd_h8_disassemble): Make static.
* cris-dis.c: Add missing prototype.
* h8500-dis.c: Likewise.
* m68hc11-dis.c: Likewise.
* pj-dis.c: Likewise.
* tic54x-dis.c: Likewise.
* v850-dis.c: Likewise.
* vax-dis.c: Likewise.
* w65-dis.c: Likewise.
* z8k-dis.c: Likewise.
* d10v-dis.c: Add missing prototype.
(dis_long): Remove unused variable.
(dis_2_short): Likewise.
* sh-dis.c: Add missing prototypes.
* v850-opc.c: Likewise.
Add unused attributes where needed.
* ns32k-dis.c: Add missing prototypes.
(bit_extract_simple): Remove unused variable.
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branch instructions for gcc 3.0.
* opcodes/s390-opc.txt: Likewise.
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* a29k-dis.c: Likewise.
* arc-dis.c: Likewise.
* ia64-opc.c: Likewise.
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(ctrl): Add unused attributes.
(cobr): Likewise.
(put_abs): Likewise.
* mips-dis.c: Add missing prototypes.
* a29k-dis.c: Likewise.
* arc-dis.c: Likewise.
* ia64-opc.c: Likewise.
* s390-dis.c: Add missing prototypes.
(init_disasm): Remove unused attribute since the parameter is
used.
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the corresponding non-likely insn is in MIPS I.
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* mips-dis.c: Likewise.
* pj-dis.c: Likewise.
* z8k-dis.c: Likewise.
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to *VALUEP. Regenerate all cgen files.
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argument.
* mips-opc.c (G6): Undefine.
(mips_builtin_opcodes): Remove gp32 entry for "move". Add macro
as the first "move" alternative.
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to build warnings.
* configure: Regenerate.
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#if 0 the functions as it is unused.
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* ppc-opc.c: Include "bfd.h".
(powerpc_operands): Add new field for reloc type.
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for coprocessor registers.
(_print_insn_mips): Get distinction between old ABI and new ABI right.
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i386:intel to better match the format of various intel i386
assemblers, like nasm, tasm or masm.
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* d30v-dis.c: Likewise.
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* cris-dis.c: Likewise.
* m10300-dis.c: Likewise.
* tic54x-dis.c: Likewise.
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* pj-dis.c: Likewise.
* z8k-dis.c: Likewise.
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