aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Expand)AuthorFilesLines
2013-10-30S/390: Disassemble 31-bit binaries with "zarch" opcode set by defaultAndreas Arnez2-11/+6
2013-10-15Fix neon vshll disassembly.Ramana Radhakrishnan2-3/+7
2013-10-142013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu4-2/+1188
2013-10-142013-10-13 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2-2/+7
2013-10-12Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcnH.J. Lu4-24/+82
2013-10-11 * Removed short_hand field from opcode table andSean Keys3-228/+209
2013-10-11opcodes/Roland McGrath2-20/+33
2013-10-10opcodes/Roland McGrath3-13/+24
2013-10-10opcodes/Roland McGrath2-3/+8
2013-10-08opcodes/Jan Beulich3-26/+33
2013-10-072013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu2-4/+8
2013-09-30Add Size64 to movq/vmovq with Reg64 operandH.J. Lu3-16/+21
2013-09-30Add AMD bdver4 support.Saravanan Ekanathan3-0/+13
2013-09-20 * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonicalAlan Modra2-5/+15
2013-09-17opcodes/Richard Sandiford2-1/+5
2013-09-04 PR gas/15914Nick Clifton2-3/+24
2013-09-022013-09-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-3/+9
2013-08-28 * aarch64-opc.c (aarch64_logical_immediate_p): Return FALSE if theNick Clifton2-1/+7
2013-08-23 opcodes/Maciej W. Rozycki2-3/+6
2013-08-23 PR binutils/15834Nick Clifton4-5/+12
2013-08-19include/opcode/Richard Sandiford3-6/+17
2013-08-19include/opcode/Richard Sandiford6-13/+41
2013-08-19Remove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3FH.J. Lu3-16/+8
2013-08-06opcodes/Richard Sandiford2-0/+6
2013-08-05 * sparc-opc.c (v9andleon): Fix thinko.Eric Botcazou1-2/+2
2013-08-05gas/Eric Botcazou3-13/+38
2013-08-04include/opcode/Richard Sandiford3-16/+248
2013-08-03include/opcode/Richard Sandiford3-13/+21
2013-08-01opcodes/Richard Sandiford2-1/+4
2013-08-01include/opcode/Richard Sandiford5-2573/+2575
2013-08-01include/opcode/Richard Sandiford3-42/+51
2013-08-01opcodes/Richard Sandiford2-172/+176
2013-08-01opcodes/Richard Sandiford3-18/+24
2013-08-01opcodes/Richard Sandiford3-6/+13
2013-08-01opcodes/Richard Sandiford2-31/+37
2013-08-01opcodes/Richard Sandiford2-1/+5
2013-07-30opcodes/Peter Bergner2-28/+15
2013-07-26Add Intel AVX-512 supportH.J. Lu9-15036/+43415
2013-07-25opcodes/Richard Sandiford2-4/+10
2013-07-25Support Intel SHAH.J. Lu7-2782/+2981
2013-07-25Correct MPX ChangeLog entriesH.J. Lu1-2/+3
2013-07-24Support Intel MPXH.J. Lu8-9979/+10292
2013-07-17opcodes/Richard Sandiford2-4/+13
2013-07-14opcodes/Richard Sandiford6-3225/+3170
2013-07-14include/opcode/Richard Sandiford3-460/+328
2013-07-14include/opcode/Richard Sandiford5-1086/+720
2013-07-14include/opcode/Richard Sandiford2-14/+19
2013-07-14opcodes/Richard Sandiford2-3/+8
2013-07-08Replace Xmmword with Qword on cvttps2piH.J. Lu3-3/+9
2013-07-07include/opcode/Richard Sandiford3-107/+24