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AgeCommit message (Expand)AuthorFilesLines
2013-04-10opcodes/Jan Kratochvil2-1/+6
2013-04-08gas/testsuite/Jan Beulich3-15/+8
2013-04-06Increase the accuracy of sparc instruction aliases.David S. Miller3-134/+219
2013-04-03 * elf32-v850.c (v850_elf_is_target_special_symbol): New function.Nick Clifton3-9/+40
2013-03-27Properly check address mode for SIBH.J. Lu2-4/+10
2013-03-27 PR binutils/15068Nick Clifton2-62/+455
2013-03-20* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type inNick Clifton2-3/+20
2013-03-12Eliminate warning message.Michael Eager2-1/+7
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+6
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+6
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2-0/+5
2013-03-11Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov2-1/+27
2013-03-08 PR binutils/15241Nick Clifton2-2/+11
2013-03-02Add RegRex64 to rizH.J. Lu3-5/+10
2013-02-28include/opcode/Yufeng Zhang5-390/+513
2013-02-27 * rl78-decode.opc (rl78_decode_opcode): Fix typo.Alan Modra3-202/+208
2013-02-25 * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton3-6/+16
2013-02-19Implement Intel SMAP instructionsH.J. Lu7-2762/+2818
2013-02-15 * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2-0/+7
2013-02-14opcodes/Yufeng Zhang2-15/+24
2013-02-13Correct ChangeLog dates.Maciej W. Rozycki1-1/+1
2013-02-13 opcodes/Maciej W. Rozycki2-0/+8
2013-02-112013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2-2/+6
2013-02-09gas/Richard Sandiford2-13/+19
2013-02-062013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore8-0/+865
2013-02-04 * po/POTFILES.in: Regenerate.Alan Modra4-1013/+1020
2013-01-30include/opcode/Yufeng Zhang8-659/+732
2013-01-24Add support for V850E3V5 architectureNick Clifton3-197/+955
2013-01-17include/opcode/Yufeng Zhang5-10/+28
2013-01-16Add OPERAND_TYPE_IMM32_64H.J. Lu4-2/+16
2013-01-15 * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton3-2/+10
2013-01-14 * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2-1/+5
2013-01-11include/opcode/Peter Bergner3-1/+76
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton7-0/+3409
2013-01-07oops - typo correction.Nick Clifton1-1/+1
2013-01-07 (make_instruction): Rename to cr16_make_instruction.Nick Clifton2-4/+9
2013-01-04 * archures.c: Add support for MIPS r5900Nick Clifton3-138/+341
2013-01-04opcodes/Yufeng Zhang3-8/+33
2013-01-04 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,Nick Clifton2-14/+19
2013-01-02Update copyright year to 2013H.J. Lu2-2/+6
2013-01-02opcodes/ChangeLogNick Clifton3-1111/+1140
2012-12-17Add copyright noticesNick Clifton11-2/+187
2012-12-13 PR binutils/14950Alan Modra2-65/+46
2012-12-10Add copyright noticesNick Clifton13-0/+81
2012-11-302012-11-30 Oleg Raikhman <oleg@adapteva.com>Joern Rennecke4-121/+126
2012-11-29opcodes/Roland McGrath2-5/+9
2012-11-29opcodes/Changelog:Michael Eager3-7/+13
2012-11-23include/opcode/Alan Modra2-24/+76
2012-11-21Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager3-2/+9
2012-11-21Add stack high register and stack low register for MicroBlazeMichael Eager3-0/+15
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