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1998-07-01 * Makefile.am (CGENDIR): Set via configure.Doug Evans4-84/+86
1998-07-01 * dvp-opc.c (DVP_OPERAND_RELOC_11_S4): Temporarily back outDoug Evans1-0/+15
1998-07-01Replace object.scm with cos.scmNick Clifton2-1/+5
1998-06-30 * m10300-opc.c: Reorder "movbu" and "movhu" instructions too.Jeff Law2-34/+42
1998-06-29 * m10300-opc.c: Reorder more instructions so that we do notJeff Law2-33/+54
1998-06-26 * m10300-dis.c: Only recognize instructions from the currentlyJeff Law3-698/+720
1998-06-26 * configure.in: For bfd_vax_arch, build vax-dis.lo.Ian Lance Taylor7-211/+588
1998-06-24 * m10300-dis.c (print_insn_mn10300): 0xf7 opcode prefix specifiesJeff Law2-4/+12
1998-06-24 * mn10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of theJeff Law2-3/+6
1998-06-24 * mn10300-dis.c (print_insn_mn10300): 0xf9 opcode prefix specifiesJeff Law3-1/+693
1998-06-24 * mn10300-opc.c (IMM32_HIGH8_MEM): New operand type.Jeff Law2-95/+169
1998-06-24 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilitiesMark Alexander1-0/+5
1998-06-23 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"Jeff Law2-0/+17
1998-06-22 * m10300-opc.c: Support 4 byte DSP instructions.Jeff Law2-45/+550
1998-06-19 * m10300-opc.c: Support 6 and 7 byte am33 instructions.Jeff Law1-0/+6
1998-06-19 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.Mark Alexander2-0/+344
1998-06-19 * m10300-opc.c: Support for 3 byte and 4 byte extended instructionsJeff Law2-10/+279
1998-06-19formatting fixesIan Lance Taylor1-23/+32
1998-06-19Update.Ulrich Drepper1-66/+71
1998-06-18Fix compile errors in set_mips_isa_typeJohn Metzler1-2/+3
1998-06-18*** empty log message ***John Metzler1-11/+14
1998-06-18Rework ChangeLog entry to avoid mentioning vr5400 in a r5900 entry.Jeff Law1-2/+1
1998-06-18 * mips-dis.c (print_insn_little_mips): Previously, instructionJohn Metzler2-36/+98
1998-06-18tipoIan Lance Taylor1-1/+1
1998-06-17start-sanitize-am33Jeff Law3-0/+626
1998-06-16Tue Jun 16 13:10:51 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor1-0/+5
1998-06-13Sat Jun 13 11:33:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-220/+313
1998-06-12 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.Tom Tromey1-0/+5
1998-06-12Fri Jun 12 11:04:06 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmu...Ian Lance Taylor2-7/+31
1998-06-10 * m32r-opc.c: Regenerate.Doug Evans1-0/+4
1998-06-09Disassemble 'add rX, rY, #0' as 'mov rX, rY'.Nick Clifton2-0/+6
1998-06-09Fix for PR16116 - remove FLAG_MUL32 attribute from MULX2H insn.Nick Clifton1-0/+4
1998-06-06Fri Jun 5 23:47:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-227/+238
1998-06-05Fri Jun 5 19:15:04 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmu...Ian Lance Taylor1-0/+5
1998-06-03xIan Lance Taylor1-0/+4
1998-06-02Tue Jun 2 15:06:46 1998 Geoff Keating <geoffk@ozemail.com.au>Ian Lance Taylor1-0/+6
1998-06-01 * mips-opc.c (c.lt.s): Remove r5900 specific variant.Jeff Law1-0/+3
1998-06-01 * vu0.h (sqc2): Fix opcode.Jeff Law2-1/+3
1998-06-01 * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1Jeff Law2-9/+38
1998-05-27sparclite 86x big endian instruction / little endian data support.Stan Cox1-0/+9
1998-05-26Fix PR15984 - Add flags to various opcodesNick Clifton2-4/+9
1998-05-26Fix Pr15998 - Make SHORT_B3(b) formats examin but not modify their first regi...Nick Clifton2-52/+62
1998-05-22 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.Doug Evans2-26/+42
1998-05-22 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.Doug Evans1-0/+5
1998-05-22 * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.Doug Evans1-0/+6
1998-05-20 * mips-opc.c (multu1): Add two operand variant for the r5900.Jeff Law1-0/+6
1998-05-19 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctlyIan Lance Taylor1-0/+5
1998-05-18* Followup for SCEI PR 15853: 2-operand R5900 "mult1" instruction.Frank Ch. Eigler2-0/+5
1998-05-18 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.Jeff Law3-6/+28
1998-05-18* Fix sanitizationFrank Ch. Eigler1-0/+3