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2007-02-052007-02-05 Dave Brolley <brolley@redhat.com>Dave Brolley13-4/+10882
* mep-*: New support for Toshiba Media Processor (MeP). * Makefile.am: Add support for MeP. * configure.in: Likewise. * disassemble.c: Likewise. * Makefile.in: Regenerated. * configure: Regenerated.
2007-02-05Fix year in entries.H.J. Lu1-2/+2
2007-02-05ld/testsuite/H.J. Lu2-6/+15
2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Undo the last change. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Undo the last change. Properly handle 64K wrap around within the same segment in 16bit mode.
2007-02-03Cosmetic change.H.J. Lu1-1/+1
2007-02-03ld/testsuite/H.J. Lu2-1/+9
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Updated. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Mask to 16bit only if there is a data16 prefix.
2007-02-022007-02-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* avr-dis.c (avr_operand): Correct PR number in comment.
2007-02-02Fix typos in year.H.J. Lu1-1/+1
2007-02-02binutils/H.J. Lu3-4/+45
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * doc/binutils.texi (objdump): Document the new addr64 option for i386 disassembler. include/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * dis-asm.h (print_i386_disassembler_options): New. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * disassemble.c (disassembler_usage): Call print_i386_disassembler_options for i386 disassembler. * i386-dis.c (print_i386_disassembler_options): New. (print_insn): Support the new addr64 option.
2007-02-02* ppc-dis.c (powerpc_dialect): Handle ppc440.Nick Clifton2-1/+12
* ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can be used.
2007-02-02 * ppc-opc.c (insert_bdm): -Many comment.Alan Modra2-31/+50
(valid_bo): Add "extract" param. Accept both powerpc and power4 BO fields when disassembling with -Many. (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
2007-01-09Move 2006 ChangeLog entries to ChangeLog-2006.H.J. Lu2-830/+838
2007-01-08bfd/Kazu Hirata2-92/+97
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido. * bfd-in2.h: Regenerate. * cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of bfd_mach_cpu32_fido. (m68k_arch_features): Use fido_a instead of cpu32. (bfd_m68k_compatible): Reject the combination of Fido and ColdFire. Accept the combination of CPU32 and Fido with a warning. * elf32-m68k.c (elf32_m68k_object_p, elf32_m68k_merge_private_bfd_data, elf32_m68k_print_private_bfd_data): Treat Fido as an architecture by itself. binutils/ * readelf.c (get_machine_flags): Treat Fido as an architecture by itself. gas/ * config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an architecture by itself. (m68k_ip): Don't issue a warning for tbl instructions on fido. (m68k_elf_final_processing): Treat Fido as an architecture by itself. include/elf/ * m68k.h (EF_M68K_FIDO): New. (EF_M68K_ARCH_MASK): OR EF_M68K_FIDO. (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove. include/opcode/ * m68k.h (m68010up): OR fido_a. opcodes/ * m68k-opc.c (m68k_opcodes): Replace cpu32 with cpu32 | fido_a except on tbl instructions.
2007-01-042007-01-04 Paul Brook <paul@codesourcery.com>Paul Brook2-4/+8
gas/ * config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form. gas/testsuite/ * gas/arm/archv6.s: Add more cpsie tests. * gas/arm/archv6.d: Ditto. opcodes/ * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04gas/testsuite/:Andreas Schwab2-2/+6
* gas/m68k/cpu32.[sd]: New test. * gas/m68k/all.exp: Run it. opcodes/: * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
2007-01-04 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,Julian Brown2-4/+9
vqrshl instructions.
2006-12-27gas/Kazu Hirata2-1/+8
* config/m68k-parse.h (m68k_register): Add CAC and MBB. * config/tc-m68k.c (fido_ctrl): New. (m68k_archs): Use fido_ctrl for -mfidoa. (m68k_cpus): Use fido_ctrl on fido-*-*. (m68k_ip): Add support for CAC and MBB. (init_table): Add CAC and MBB. opcodes/ * m68k-dis.c (print_insn_arg): Add support for cac and mbb.
2006-12-27 * m68k-opc.c (m68k_opcodes): Add sleep and trapx.Kazu Hirata2-0/+8
2006-12-15gas/testsuite/H.J. Lu2-1/+11
2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead of xmmword ptr. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. opcodes/ 2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (o_mode): New for 16-byte operand. (intel_operand_size): Generate "OWORD PTR " for o_mode. (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
2006-12-14gas/testsuite/H.J. Lu2-1/+21
2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: Add cmpxchg16b. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CMPXCHG8B_Fixup): New. (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
2006-12-112006-12-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+14
* i386-dis.c (Eq): Replaced by ... (Mq): New. This. (Ma): Defined with OP_M instead of OP_E. (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq. (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
2006-12-11bfd/Daniel Jacobowitz2-1/+5
* configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (bfd.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. binutils/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. gas/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (as.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. gprof/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (gprof.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in: Regenerated. ld/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (ld.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in: Regenerated. opcodes/ * po/Make-in (.po.gmo): Put gmo files in objdir.
2006-12-102006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+29
* i386-dis.c (X86_64_1): New. (X86_64_2): Likewise. (X86_64_3): Likewise. (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64 tables. (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
2006-12-092006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-21/+25
* i386-dis.c: Adjust white spaces.
2006-12-04opcodes/Jan Beulich2-0/+5
2006-12-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_J): Update used_prefixes in v_mode. gas/testsuite/ 2006-12-04 Jan Beulich <jbeulich@novell.com> * gas/i386/opcode-intel.d: Fix wrong expectation. Make white space expectations more consistent.
2006-12-01opcodes/Jan Beulich2-58/+39
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SEG_Fixup): Delete. (Sv): Use OP_SEG. (putop): New suffix character 'D'. (dis386): Use it. (grps): Likewise. (OP_SEG): Handle bytemode other than w_mode. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.d: Adjust. * gas/i386/naked.d: Adjust. * gas/i386/opcode.d: Adjust.
2006-12-01opcodes/Jan Beulich2-18/+85
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (zAX): New. (Xz): New. (Yzr): New. (z_mode): New. (z_mode_ax_reg): New. (putop): New suffix character 'G'. (dis386): Use it for in, out, ins, and outs. (intel_operand_size): Handle z_mode. (OP_REG): Delete unreachable case indir_dx_reg. (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle z_mode_ax_reg. (OP_ESreg): Fix Intel syntax operand size handling. (OP_DSreg): Likewise. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-io.[sd]: New. * gas/i386/x86-64-io-intel.d: New. * gas/i386/x86-64-io-suffix.d: New. * gas/i386/i386.exp: Run new tests.
2006-12-01opcodes/Jan Beulich2-48/+33
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally. (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix used. For 'R' and 'W' suffix, simplify and fix Intel mode. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.s: Use Intel syntax in Intel syntax test. * gas/i386/x86-64-cbw.[sd]: New. * gas/i386/x86-64-cbw-intel.d: New. * gas/i386/i386.exp: Run new tests.
2006-11-292006-11-29 Paul Brook <paul@codesourcery.com>Paul Brook2-2/+6
gas/ * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans encoding. gas/testsuite/ * gas/arm/vfpv3-const-conv.s: Improve test coverage. * gas/arm/vfpv3-const-conv.d: Adjust expected output. * gas/arm/vfp-neon-syntax_t2.d: Ditto. * gas/arm/vfp-neon-syntax.d: Ditto. opcodes/ * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
2006-11-22opcodes/Daniel Jacobowitz2-76/+165
* arm-dis.c (last_is_thumb): Delete. (enum map_type, last_type): New. (print_insn_data): New. (get_sym_code_type): Take MAP_TYPE argument. Check the type of the right symbol. Handle $d. (print_insn): Check for mapping symbols even without a normal symbol. Adjust searching. If $d is found see how much data to print. Handle data. gas/ * config/tc-arm.h (md_cons_align): Define. (mapping_state): New prototype. * config/tc-arm.c (mapping_state): Make global. gas/testsuite/ * gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d, gas/arm/tls.d: Update for $d support. * gas/arm/mapshort.d, gas/arm/mapshort.s: New test. * gas/elf/section2.e-armeabi: Update. * gas/elf/section2.e-armelf: New file. * gas/elf/elf.exp: Use it. ld/testsuite/ * ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update for $d support.
2006-11-16gas/Nathan Sidwell2-58/+68
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases. gas/testsuite/ * gas/m68k/all.exp: Add mcf-trap. * gas/m68k/mcf-trap.[sd]: New. opcodes/ * m68k-opc.c (m68k_opcodes): Place trap instructions before set conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-102006-11-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-6/+13
* i386-dis.c (print_insn): Check PREFIX_REPNZ before PREFIX_DATA when prefix user table is used.
2006-11-102006-11-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-14/+245
* i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ... (twobyte_uses_DATA_prefix): This. (twobyte_uses_REPNZ_prefix): New. (twobyte_uses_REPZ_prefix): Likewise. (threebyte_0x38_uses_DATA_prefix): Likewise. (threebyte_0x38_uses_REPNZ_prefix): Likewise. (threebyte_0x38_uses_REPZ_prefix): Likewise. (threebyte_0x3a_uses_DATA_prefix): Likewise. (threebyte_0x3a_uses_REPNZ_prefix): Likewise. (threebyte_0x3a_uses_REPZ_prefix): Likewise. (print_insn): Updated checking usages of DATA/REPNZ/REPZ prefixes.
2006-11-06 * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.Alan Modra2-1/+5
2006-11-01* tc-score.c (do16_rdrs): Handle not! instruction especially.Nick Clifton2-53/+57
* score-opc.h (score_opcodes): Delete modifier '0x'. * gas/score/rD_rA.d: Correct not! and not.c instruction disassembly. * gas/score/b.d: Correct b! and b instruction disassembly.
2006-10-312006-10-30 Paul Brook <paul@codesourcery.com>Paul Brook2-5/+106
binutils/ * objdump.c (disassemble_section): Set info->symtab_pos. (disassemble_data): Set info->symtab and info->symtab_size. include/ * dis-asm.h (disassemble_info): Add symtab, symtab_pos and symtab_size. opcodes/ * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New. (get_sym_code_type): New function. (print_insn): Search for mapping symbols.
2006-10-31* tc-score.c (data_op2): Check invalid operands.Nick Clifton2-1/+6
(my_get_expression): Const operand of some instructions can not be symbol in assembly. (get_insn_class_from_type): Handle instruction type Insn_internal. (do_macro_ldst_label): Modify inst.type. (Insn_PIC): Delete. * score-inst.h (enum score_insn_type): Add Insn_internal. * tc-score.c (data_op2): The immediate value in lw is 15 bit signed. * score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-262006-10-26 Ben Elliston <bje@au.ibm.com>Peter Bergner2-12/+277
Anton Blanchard <anton@samba.org> Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH, AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define. (POWER6): Define. (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.", "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.". Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd", "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr", "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix", "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul", "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.", "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc", "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix", "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.", "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.", "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.", "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.", "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.", "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq", "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.", "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.", "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq", "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.", "diexq" and "diexq." opcodes.
2006-10-26 * h8300-dis.c (bfd_h8_disassemble): Add missing consts.Daniel Jacobowitz2-3/+7
2006-10-25New Cell SPU port.Alan Modra9-428/+1021
2006-10-24Add powerpc cell support.Alan Modra3-2/+29
2006-10-23Fix AMDFAM10 POPCNT instructionMichael Meissner2-4/+21
2006-10-202006-10-20 Andrew Stubbs <andrew.stubbs@st.com>Andrew Stubbs2-2/+7
opcodes/ * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB duplicating it. gas/testsuite/ * gas/sh/pcrel-coff.d: Update patterns (remove 0x on addresses). * gas/sh/pcrel-hms.d: Likewise. * gas/sh/pcrel.d: Likewise. * gas/sh/pcrel2.d: Likewise. * gas/sh/pic.d: Likewise. * gas/sh/tlsd.d: Likewise. * gas/sh/tlsdnopic.d: Likewise. * gas/sh/tlsdpic.d: Likewise.
2006-10-182006-10-18 Dave Brolley <brolley@redhat.com>Dave Brolley3-3/+7
* configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch. * configure: Regenerated.
2006-09-29Regenerate.Alan Modra2-0/+6
2006-09-26bfd/Joseph Myers2-12/+104
2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * archures.c: Add definition for bfd_mach_arm_iWMMXt2. * cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2. (arch_info_struct, bfd_arm_update_notes): Likewise. (architectures): Likewise. (bfd_arm_merge_machines): Check for iWMMXt2. * bfd-in2.h: Rebuild. gas/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * config/tc-arm.c (arm_cext_iwmmxt2): New. (enum operand_parse_code): New code OP_RIWR_I32z. (parse_operands): Handle OP_RIWR_I32z. (do_iwmmxt_wmerge): New function. (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is a register. (do_iwmmxt_wrwrwr_or_imm5): New function. (insns): Mark instructions as RIWR_I32z as appropriate. Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>, waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n}, wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r}, wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx. (md_begin): Handle IWMMXT2. (arm_cpus): Add iwmmxt2. (arm_extensions): Likewise. (arm_archs): Likewise. gas/testsuite/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * gas/arm/iwmmxt2.s: New file. * gas/arm/iwmmxt2.d: New file. include/opcode/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define. opcodes/ 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Ian Lance Taylor <ian@wasabisystems.com> Ben Elliston <bje@wasabisystems.com> * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may only be used with the default multiply-add operation, so if N is set, don't bother printing X. Add new iwmmxt instructions. (IWMMXT_INSN_COUNT): Update. (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14 with a 'c' suffix. (print_insn_coprocessor): Check for iWMMXt2. Handle format specifiers 'r', 'i'.
2006-09-242006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>H.J. Lu2-1/+8
PR binutils/3100 * i386-dis.c (prefix_user_table): Fix the second operand of maskmovdqu instruction to allow only %xmm register instead of both %xmm register and memory.
2006-09-24Add PR binutils/3000 to its entry.H.J. Lu1-0/+1
2006-09-23gas/H.J. Lu2-1/+8
2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * config/tc-i386.c (match_template): Check address size prefix to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32 operand. gas/testsuite/ 2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * gas/i386/addr16.d: New file. * gas/i386/addr16.s: Likewise. * gas/i386/addr32.d: Likewise. * gas/i386/addr32.s: Likewise. * gas/i386/i386.exp: Add "addr16" and "addr32". * gas/i386/x86-64-addr32.s: Add tests for "add32 mov". * gas/i386/x86-64-addr32.d: Updated. opcodes/ 2006-09-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/3235 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an address size prefix.
2006-09-16Add support for Score target.Nick Clifton8-3/+1032
2006-09-16* bfd-in.h (STRING_AND_COMMA): New macro. Takes one constant string as itsNick Clifton7-47/+58
argument and emits the string followed by a comma and then the length of the string. (CONST_STRNEQ): New macro. Checks to see if a variable string has a constant string as its initial characters. (CONST_STRNCPY): New macro. Copies a constant string to the start of a variable string. * bfd-in2.h: Regenerate. * <remainign files>: Make use of the new macros.
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