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2003-07-18* objdump.c (main) :Accept multiple -M switch.Nick Clifton2-19/+24
* doc/binutils.texi: Document that multiple -M switches are accepted and that a single -M switch can contain comma separated options. * arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be NUL terminated. (parse_disassembler_options): Allow options to be space or comma separated.
2003-07-17Update translationsNick Clifton4-217/+924
2003-07-15include/opcode/Richard Sandiford2-0/+8
* mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
2003-07-14Update Turkish translation files for bfd, gas and opcodesNick Clifton4-104/+452
2003-07-11Update pot files.Alan Modra2-29/+55
2003-07-102000-05-25 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva3-1/+352
* m10300-dis.c (disassemble): Negate negative accumulator's shift. 2000-05-24 Alexandre Oliva <aoliva@cygnus.com> * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume 32-bit longs when sign-extending operands. 2000-04-20 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs. * m10300-dis.c (HAVE_AM33_2): Define. (disassemble): Use it. (HAVE_AM33): Redefine. (print_insn_mn10300): Fix mask for 5-byte extended insns. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Renamed AM332 to AM33_2. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Defined AM33 2.0 register operands. Added support for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns. * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended insn code of AM33 2.0. (disassemble): Recognize FMT_D3. Print out FP register names.
2003-07-092003-07-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-2/+8
* mips-dis.c (set_default_mips_dis_options): Get BFD from the disassembler_info's section, rather than from the disassembler_info's symbols pointer.
2003-07-07 * ppc-opc.c: Remove NULL pointer checks. Formatting. RemoveAlan Modra3-93/+79
extraneous ATTRIBUTE_UNUSED. * ppc-dis.c (print_insn_powerpc): Always pass a valid address to operand->extract.
2003-07-04 * ppc-opc.c: Convert to C90, removing unnecessary prototypes andAlan Modra2-267/+221
casts. Formatting.
2003-07-04 * ppc-opc.c: Remove PARAMS from prototypes.Alan Modra2-115/+136
(FXM4): Define. (insert_fxm): New function, used by both FXM and FXM4. (extract_fxm): Likewise. (XFXFXM_MASK): Remove 1 << 20 term. (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
2003-07-01 * s390-dis.c (s390_extract_operand): Add support for long displacements.Martin Schwidefsky5-14/+224
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990. * s390-opc.c (D20_20): Add define for 20 bit displacements. (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD, INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add new instruction formats. (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD, MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise. (s390_opformats): Likewise. * s390-opc.txt: Add new instructions for cpu type z990. Add missing hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-06-23gas/H.J. Lu2-17/+116
2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-19 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.Christian Groessler4-793/+992
(print_insn_z8k): Correctly check return value from z8k_lookup_instr call. (unparse_instr): Handle CLASS_IRO case. * z8kgen.c: Fix function definitions. Fix formatting. (opt): Add brk opcode alias for non-simulator breakpoint. Add missing and fix existing in/out and sin/sout opcode definitions. (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out opcodes. (internal): Check p->flags for non-zero before dereferencing it. (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added opcodes and renumber the remaining lines repectively. (main): Remove "-d" command line switch. * z8k-opc.h: Regenerate with new z8kgen.c.
2003-06-11bfd/H.J. Lu2-11/+19
2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. binutils/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gas/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gprof/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. ld/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. opcodes/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise.
2003-06-10* bfd/Makefile.am (config.status): Depend on version.h.Alan Modra4-15/+25
Run "make dep-am" in bfd/ and elsewhere, and regen files.
2003-06-10opcodes:Doug Evans24-36/+48
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
2003-06-10Add "attn", "lq" and "stq" power4 insns.Alan Modra2-42/+161
2003-06-10opcodes/Richard Sandiford2-1/+6
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
2003-06-05Add code to handle even-numbered only register operandsNick Clifton9-182/+364
2003-06-032003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2-190/+538
and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx. * h8300-dis.c: Ditto.
2003-06-03FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.Nick Clifton15-599/+961
Use maintainer mode to regenerate ports.
2003-05-242003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-4/+12
gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
2003-05-20Regenerate - forgot to commit with last commitAndreas Jaeger1-2/+2
2003-05-182003-05-18 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-2/+10
gas: * config/tc-i860.c (i860_process_insn): Initialize fc after each opcode mismatch. include/opcode: * i860.h (form, pform): Add missing .dd suffix. opcodes: * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit, print it. bfd: * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-17 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.Andreas Jaeger2-2/+8
(libopcodes_la_DEPENDENCIES): Add libbfd.la. * Makefile.in: Regenerated.
2003-05-16New Romanian translationNick Clifton4-4/+456
2003-05-12Add support for h8300hn and h8300snNick Clifton2-2/+8
2003-05-09 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 inAlan Modra2-1/+6
case char is unsigned.
2003-05-01 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.Christian Groessler1-0/+8
(unpack_instr): Fix representation of segmented addresses. (intr_name): Added, contains names of the parameters to the EI/DI instructions. (unparse_instr): Fix display of EI/DI parameters.
2003-05-01 * expr.h: Fix comments in operatorT typedef.Christian Groessler1-4/+26
* config/tc-z8k.c: Add 2003 to copyright message. Fold s_segm() and s_unseg() into one function s_segm(parm) which decides by the parameter. (md_begin): Don't set linkrelax. Only set Z8002 default if no command line argument was given to select the intended architecure. (get_interrupt_operand): Warn if NOP type code is emitted. (newfix): New parameter 'size', forward it to 'fix_new_exp'. (apply_fix): Call newfix with additional 'size' parameter. (build_bytes): Remove unused variable 'nib'. Detect overflow in 4 bit immediate arguments. (md_longopts): Add 'linkrelax' option. (md_parse_option): Adapt to new s_segm function. Set 'linkrelax' variable when 'linkrelax' command line option is specified. (md_show_usage): Display 'linkrelax' option. (md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8. Add cases R_CALLR and R_REL16. * config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
2003-04-22 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.Doug Evans26-172/+199
* frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate. * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate. * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate. * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
2003-04-15Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton2-16/+19
2003-04-08* ia64-ic.tbl (fr-readers): Add mem-writers-fp.Nick Clifton3-85/+97
* ia64-asmtab.c: Regenerate. * gas/ia64/dependency-1.s: New file: Test read before write dependency. * gas/ia64/dependency-1.d: New file: Expected assembly results. * gas/ia64/ia64.exp: Run the new test.
2003-04-08* mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.Alexandre Oliva2-1/+5
2003-04-08* mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.Alexandre Oliva2-1/+5
2003-04-04Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal2-152/+158
s/c3x/tic3x/. 2003 copyright update
2003-04-01Add Xtensa portNick Clifton6-189/+745
2003-04-01Fixes for iWMMXt contribution.Nick Clifton3-3/+8
2003-03-25Add iWMMXt supportNick Clifton3-20/+238
2003-03-22 * i386-dis.c (dis386): Recognize icebp (0xf1).Doug Evans2-1/+5
2003-03-21 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME toMartin Schwidefsky5-666/+717
S390_OPCODE_ZARCH. (print_insn_s390): Use new modes field of s390_opcodes. * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove. (s390_opcode_mode_val, s390_opcode_cpu_val): New enums. (struct op_struct): Remove archbits. Add mode_bits and min_cpu. (insertOpcode): Replace archbits by min_cpu and mode_bits. (dumpTable): Write mode_bits and min_cpu instead of archbits. (main): Adapt to new format in s390-opcode.txt. * s390-opc.c (s390_opformats): Replace archbits by min_cpu and mode_bits. * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-17 Fix formatting. Update copyright date.Nick Clifton2-63/+66
2003-03-14ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.Daniel Jacobowitz2-0/+5
2003-02-25 * hppa-dis.c: Formatting.Alan Modra2-142/+194
* hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
2003-02-25 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not printAlan Modra2-2/+11
the space register when the value is zero.
2003-02-232003-02-23 Elias Athanasopoulos <elathan@phys.uoa.gr>Chris Demetriou2-3/+8
* mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned, use ARRAY_SIZE in loops.
2003-02-12003-02-12 Dave Brolley <brolley@redhat.com>Dave Brolley2-34/+39
* fr30-desc.c: Regenerate.
2003-02-06 * i386-dis.c (dq_mode, Edq): Define.Alan Modra2-121/+129
(dis386_twobyte): Correct movd operands. (OP_E): Handle dq_mode case.
2003-01-29(print_insn_sparc): When examining values added in to rs1, make sure thatNick Clifton2-46/+61
there are previous instructions.
2003-01-23Add SH2E supportNick Clifton3-201/+225