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2006-05-14 [ gas/ChangeLog ]Thiemo Seufer2-134/+142
* config/tc-mips.c (macro_build): Test for currently active mips16 option. (mips16_ip): Reject invalid opcodes. [ opcodes/ChangeLog ] * mips16-opc.c (I1, I32, I64): New shortcut defines. (mips16_opcodes): Change membership of instructions to their lowest baseline ISA. [ gas/testsuite/ChangeLog ] * gas/mips/mips.exp: Run new tests. * gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s, gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
2006-05-09gas/testsuite/H.J. Lu2-2/+6
2006-05-09 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run x86-64-gidt. * gas/i386/x86-64-gidt.d: New file. * gas/i386/x86-64-gidt.s: Likewise. opcodes/ 2006-05-09 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (grps): Update sgdt/sidt for 64bit.
2006-05-05 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx asJulian Brown2-4/+9
vldm/vstm.
2006-05-05 [ gas/ChangeLog ]Thiemo Seufer2-0/+6
* config/tc-mips.c (macro_build): Add case 'k' to handle cache instruction. (macro): Add new case M_CACHE_AB. [ opcodes/ChangeLog ] * mips-opc.c: Add macro for cache instruction. [ include/opcode/ChangeLog ] * mips.h (enum): Add macro M_CACHE_AB.
2006-05-04[ gas/testsuite/ChangeLog ]Thiemo Seufer4-105/+160
2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2. * gas/mips/set-arch.d: Adjust according to opcode table changes. [ include/opcode/ChangeLog ] 2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> David Ung <davidu@mips.com> * mips.h: Add INSN_SMARTMIPS define. [ opcodes/ChangeLog ] 2006-05-04 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> David Ung <davidu@mips.com> * mips-dis.c (mips_arch_choices): Add smartmips instruction decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to MIPS64R2. * mips-opc.c: fix random typos in comments. (INSN_SMARTMIPS): New defines. (mips_builtin_opcodes): Add paired single support for MIPS32R2. Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd, flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the FP_S and FP_D flags to denote single and double register accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards. Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1 for MIPS32R2. Add SmartMIPS instructions. Add two-argument variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to release 2 ISAs. * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-032006-05-03 Thiemo Seufer <ths@mips.com>Thiemo Seufer2-1/+5
[ opcodes/ChangeLog ] * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-mt.d: Fix mftr argument order.
2006-05-02 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.Thiemo Seufer2-3/+25
(print_mips16_insn_arg): Force mips16 to odd addresses.
2006-04-30[ gas/ChangeLog ]Thiemo Seufer3-0/+93
2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * config/tc-mips.c (validate_mips_insn): Handling of udi cases. (mips_immed): New table that records various handling of udi instruction patterns. (mips_ip): Adds udi handling. [ include/opcode/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips.h: Defines udi bits and masks. Add description of characters which may appear in the args field of udi instructions. [ opcodes/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips-opc.c (mips_builtin_opcodes): Add udi instructions "udi0" to "udi15". * mips-dis.c (print_insn_args): Adds udi argument handling.
2006-04-29Fix buglet noticed while looking at PR 1298.Jim Wilson2-2/+9
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing error message.
2006-04-28Don't mis-spell your boss' name...Thiemo Seufer1-4/+4
2006-04-28[ opcodes/ChangeLog ]Thiemo Seufer2-0/+28
2006-04-28 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> Nigel Stevens <nigel@mips.com> * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register names. [ gas/testsuite/ChangeLog ] 2006-04-28 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> Nigel Stevens <nigel@mips.com> * gas/mips/cp0sel-names-mips32r2.d, gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
2006-04-28 * mips-dis.c (print_insn_args): Add mips_opcode argument.Thiemo Seufer2-2/+10
(print_insn_mips): Adjust print_insn_args call.
2006-04-28 * mips-dis.c (print_insn_args): Print $fcc only for FPThiemo Seufer2-1/+9
instructions, use $cc elsewise.
2006-04-28 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):Thiemo Seufer2-11/+21
Map MIPS16 registers to O32 names. (print_mips16_insn_arg): Use mips16_reg_names.
2006-04-26 * arm-dis.c (print_insn_neon): Disassemble floating-point constantJulian Brown2-2/+30
VMOV.
2006-04-26 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convertJulian Brown2-368/+1096
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?]. Add unified load/store instruction names. (neon_opcode_table): New. (arm_opcodes): Expand meaning of %<bitfield>['`?]. (arm_decode_bitfield): New. (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers. Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y. (print_insn_neon): New. (print_insn_arm): Adjust print_insn_coprocessor call. Call print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers. (print_insn_thumb32): Likewise.
2006-04-19 * Makefile.am: Run "make dep-am".Alan Modra3-34/+43
* Makefile.in: Regenerate.
2006-04-19 * avr-dis.c (avr_operand): Warning fix.Alan Modra2-1/+3
2006-04-19bfd/Alan Modra2-2/+6
* warning.m4 (--enable-werror, -build-warnings): Format help messages. * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure.in (--enable-targets): Indent help message. * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2006-04-16Update POTFILES.in.Daniel Jacobowitz2-0/+11
2006-04-12PR binutils/2454Nick Clifton2-1/+13
* avr-dis.c (avr_operand): Arrange for a comment to appear before the symolic form of an address, so that the output of objdump -d can be reassembled.
2006-04-10* m32c.opc (parse_unsigned_bitbase): Take a new parameter whichDJ Delorie2-10/+45
decides if this function accepts symbolic constants or not. (parse_signed_bitbase): Likewise. (parse_unsigned_bitbase8): Pass the new parameter. (parse_unsigned_bitbase11): Likewise. (parse_unsigned_bitbase16): Likewise. (parse_unsigned_bitbase19): Likewise. (parse_unsigned_bitbase27): Likewise. (parse_signed_bitbase8): Likewise. (parse_signed_bitbase11): Likewise. (parse_signed_bitbase19): Likewise. * m32c-asm.c: Regenerate.
2006-04-062006-04-06 Carlos O'Donell <carlos@codesourcery.com>Carlos O'Donell4-1/+13
* Makefile.tpl: Add install-html target. * Makefile.def: Add install-html target. * Makefile.in: Regenerate. * configure.in: Add --with-datarootdir, --with-docdir, and --with-htmldir options. * configure: Regenerate. bfd/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add install-html target. * Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir htmldir. Add install-html and install-html-recursive targets. * Makefile.in: Regenerate. * configure.in: AC_SUBST for datarootdir, docdir and htmldir. * configure: Regenerate. bfd/doc/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-html and install-html-am targets. Define datarootdir, docdir and htmldir. * Makefile.in: Regenerate. binutils/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add install-html target. * Makefile.am: Add install-html and install-html-recursive targets. * Makefile.in: Regenerate. * configure.in: AC_SUBST datarootdir, docdir and htmldir. * configure: Regenerate. * doc/Makefile.am: Add install-html and install-html-am targets. * doc/Makefile.in: Regenerate. etc/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * Makefile.in: Add install-html target. Add htmldir, docdir and datarootdir. * configure.texi: Document install-html target. * configure.in: AC_SUBST datarootdir, docdir, htmldir. * configure: Regenerate. gas/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add install-html target. * Makefile.am: Add install-html and install-html-recursive targets. * Makefile.in: Regenerate. * configure.in: AC_SUBST datarootdir, docdir, htmldir. * configure: Regenerate. * doc/Makefile.am: Add install-html and install-html-am targets. * doc/Makefile.in: Regenerate. gprof/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add install-html target. * Makefile.am: Add install-html, install-html-am and install-html-recursive targets. * Makefile.in: Regenerate. * configure.in: AC_SUBST datarootdir, docdir, htmldir. * configure: Regenerate. intl/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * intl/Makefile.in: Add html info and dvi and install-html to .PHONY Add install-html target. ld/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-html, install-html-am, and install-html-recursive targets. * Makefile.in: Regenerate. * configure.in: AC_SUBST datarootdir, docdir, htmldir. * configure: Regenerate. * po/Make-in: Add install-html target. opcodes/ 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-html target. * Makefile.in: Regenerate.
2006-04-06Updated Vietnamese translation.Nick Clifton2-59/+65
2006-03-31 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.Alan Modra2-2/+6
2006-03-16 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct theBernd Schmidt2-109/+32
logic to identify halfword shifts.
2006-03-162006-03-16 Paul Brook <paul@codesourcery.com>Paul Brook2-2/+7
gas/ * config/tc-arm.c (insns): Add "svc". gas/testsuite/ * gas/arm/svc.d: New test. * gas/arm/svc.s: New test. * gas/arm/inst.d: Accept svc mnemonic. * gas/arm/thumb.d: Ditto. * gas/arm/wince_inst.d: Ditto. opcodes/ * arm-dis.c (arm_opcodes): Rename swi to svc. (thumb_opcodes): Ditto.
2006-03-14* m32c-asm.c: Regenerate.DJ Delorie8-221/+306
* m32c-desc.c: Likewise. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-ibld.c: Likewise. * m32c-opc.c: Likewise. * m32c-opc.h: Likewise.
2006-03-14i* m32c-desc.c: Regenerate.DJ Delorie4-173/+224
* m32c-opc.c: Likewise. * m32c-opc.h: Likewise.
2006-03-11* m32c.cpu (mul.l): New.DJ Delorie4-84/+361
(mulu.l): New. * m32c-desc.c: Regenerate with mul.l, mulu.l. * m32c-opc.c: Likewise. * m32c-opc.h: Likewise.
2006-03-09Update Swedish translationsNick Clifton2-152/+178
2006-03-07gas/testsuite/H.J. Lu2-11/+107
2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and x86-64-rep-suffix. * gas/i386/naked.d: Replace repz with rep. * gas/i386/x86_64.d: Likewise. * gas/i386/rep-suffix.d: New file. * gas/i386/rep-suffix.s: Likewise. * gas/i386/rep.d: Likewise. * gas/i386/rep.s: Likewise. * gas/i386/x86-64-rep-suffix.d: Likewise. * gas/i386/x86-64-rep-suffix.s: Likewise. * gas/i386/x86-64-rep.d: Likewise. * gas/i386/x86-64-rep.s: Likewise. opcodes/ 2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * i386-dis.c (REP_Fixup): New function. (AL): Remove duplicate. (Xbr): New. (Xvr): Likewise. (Ybr): Likewise. (Yvr): Likewise. (indirDXr): Likewise. (ALr): Likewise. (eAXr): Likewise. (dis386): Updated entries of ins, outs, movs, lods and stos.
2006-03-05* cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bitNick Clifton12-70/+158
value into an unsigned 32-bit field when the host is a 64-bit machine.
2006-03-03Fix parseing functions to return an error message if the parse failedNick Clifton3-24/+50
2006-02-27bfd/doc/Carlos O'Donell2-1/+5
2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add html target. * Makefile.in: Regenerate. bfd/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. binutils/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. gas/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * doc/Makefile.am: Add html target. * doc/Makefile.in: Regenerate. * po/Make-in: Add html target. gprof/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. ld/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add html target. * Makefile.in: Regenerate. * po/Make-in: Add html target. opcodes/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. etc/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.in: TEXI2HTML uses makeinfo. Define HTMLFILES. Add html targets. * configure.texi: Use ifnottex. Add alternative image format specifier as jpg. * standards.texi: Use ifnottex. intl/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * intl/Makefile.in: Add html target.
2006-02-27gas/H.J. Lu2-5/+104
2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (output_insn): Support Intel Merom New Instructions. * gas/config/tc-i386.h (CpuMNI): New. (CpuUnknownFlags): Add CpuMNI. gas/testsuite/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add merom and x86-64-merom. * gas/i386/merom.d: New file. * gas/i386/merom.s: Likewise. * gas/i386/x86-64-merom.d: Likewise. * gas/i386/x86-64-merom.s: Likewise. include/opcode/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Merom New Instructions. opcodes/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by Intel Merom New Instructions. (THREE_BYTE_0): Likewise. (THREE_BYTE_1): Likewise. (three_byte_table): Likewise. (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use THREE_BYTE_1 for entry 0x3a. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (print_insn): Handle 3-byte opcodes used by Intel Merom New Instructions.
2006-02-252006-02-24 David S. Miller <davem@sunset.davemloft.net>David S. Miller3-3/+50
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry. (v9_hpriv_reg_names): New table. (print_insn_sparc): Allow values up to 16 for '?' and '!'. New cases '$' and '%' for read/write hyperprivileged register. * sparc-opc.c (sparc_opcodes): Add new entries for UA2005 window handling and rdhpr/wrhpr instructions.
2006-02-24[include/elf]DJ Delorie5-12447/+12476
* m32c.h: Add relax relocs. [cpu] * m32c.cpu (RL_TYPE): New attribute, with macros. (Lab-8-24): Add RELAX. (unary-insn-defn-g, binary-arith-imm-dst-defn, binary-arith-imm4-dst-defn): Add 1ADDR attribute. (binary-arith-src-dst-defn): Add 2ADDR attribute. (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP attribute. (jsri16, jsri32): Add 1ADDR attribute. (jsr32.w, jsr32.a): Add JUMP attribute. [opcodes] * m32c-desc.c: Regenerate with linker relaxation attributes. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-opc.c: Likewise. [gas] * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. (tc_gen_reloc): Don't define. * config/tc-m32c.c (rl_for, relaxable): New convenience macros. (OPTION_LINKRELAX): New. (md_longopts): Add it. (m32c_relax): New. (md_parse_options): Set it. (md_assemble): Emit relaxation relocs as needed. (md_convert_frag): Emit relaxation relocs as needed. (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. (m32c_apply_fix): New. (tc_gen_reloc): New. (m32c_force_relocation): Force out jump relocs when relaxing. (m32c_fix_adjustable): Return false if relaxing. [bfd] * elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs. (m32c_elf_relocate_section): Don't relocate them. (compare_reloc): New. (relax_reloc): Remove. (m32c_offset_for_reloc): New. (m16c_addr_encodings): New. (m16c_jmpaddr_encodings): New. (m32c_addr_encodings): New. (m32c_elf_relax_section): Relax jumps and address displacements. (m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up short jumps. * reloc.c: Add m32c relax relocs. * libbfd.h: Regenerate.
2006-02-242006-02-24 Paul Brook <paul@codesourcery.com>Paul Brook2-83/+203
gas/ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. (struct asm_barrier_opt): Define. (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. (parse_psr): Accept V7M psr names. (parse_barrier): New function. (enum operand_parse_code): Add OP_oBARRIER. (parse_operands): Implement OP_oBARRIER. (do_barrier): New function. (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. (do_t_cpsi): Add V7M restrictions. (do_t_mrs, do_t_msr): Validate V7M variants. (md_assemble): Check for NULL variants. (v7m_psrs, barrier_opt_names): New tables. (insns): Add V7 instructions. Mark V6 instructions absent from V7M. (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. (arm_cpu_option_table): Add Cortex-M3, R4 and A8. (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. (struct cpu_arch_ver_table): Define. (cpu_arch_ver): New. (aeabi_set_public_attributes): Use cpu_arch_ver. Set Tag_CPU_arch_profile. * doc/c-arm.texi: Document new cpu and arch options. gas/testsuite/ * gas/arm/thumb32.d: Fix expected msr and mrs output. * gas/arm/arch7.d: New test. * gas/arm/arch7.s: New test. * gas/arm/arch7m-bad.l: New test. * gas/arm/arch7m-bad.d: New test. * gas/arm/arch7m-bad.s: New test. include/opcode/ * arm.h: Add V7 feature bits. opcodes/ * arm-dis.c (arm_opcodes): Add V7 instructions. (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. (print_arm_address): New function. (print_insn_arm): Use it. Add 'P' and 'U' cases. (psr_name): New function. (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-23bfd/H.J. Lu4-4793/+4946
2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * cpu-ia64-opc.c (ins_immu5b): New. (ext_immu5b): Likewise. (elf64_ia64_operands): Add IMMU5b. gas/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. gas/testsuite/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/opc-i.s: Add tests for tf. * gas/ia64/pseudo.s: Likewise. * gas/ia64/opc-i.d: Updated. * gas/ia64/pseudo.d: Likewise. include/opcode/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. opcodes/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64-opc-i.c (bXc): New. (mXc): Likewise. (OpX2TaTbYaXcC): Likewise. (TF). Likewise. (TFCM). Likewise. (ia64_opcodes_i): Add instructions for tf. * ia64-opc.h (IMMU5b): New. * ia64-asmtab.c: Regenerated.
2006-02-23Update copyright years.H.J. Lu3-2/+8
2006-02-23gas/H.J. Lu7-4429/+4563
2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-17Add support for the Infineon XC16X.Nick Clifton13-4/+10741
2006-02-11gas/testsuite/H.J. Lu2-2/+7
2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix". * gas/i386/x86-64-crx-suffix.d: Minor update. * gas/i386/x86-64-drx-suffix.d: New file. * gas/i386/x86-64-drx.d: Likewise. * gas/i386/x86-64-drx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use "movZ" for debug register moves.
2006-02-11gas/testsuite/H.J. Lu2-2/+17
2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix". * gas/i386/x86-64-crx-suffix.d: New file. * gas/i386/x86-64-crx.d: Likewise. * gas/i386/x86-64-crx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c ('Z'): Add a new macro. (dis386_twobyte): Use "movZ" for control register moves.
2006-02-10Fix %hi() operator for 64-bit hosts.Nick Clifton2-0/+6
2006-02-07 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,Nathan Sidwell2-53/+8
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x, bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249, bfd_mach_mcf547x, bfd_mach_mcf548x): Remove. (bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div, bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac, bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac, bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp, bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac, bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac, bfd_mach_mcf_isa_b_usp_float_emac): New. (bfd_default_scan): Update coldfire mapping. * bfd/bfd-in.h (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Declare. * bfd/bfd-in2.h: Rebuilt. * bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines, adjust legacy names. (m68k_arch_features): New. (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Define. * bfd/elf32-m68k.c (elf32_m68k_object_p): New. (elf32_m68k_merge_private_bfd_data): Merge the CF EF flags. (elf32_m68k_print_private_bfd_data): Print the CF EF flags. (elf_backend_object_p): Define. * bfd/ieee.c (ieee_write_processor): Update coldfire machines. * bfd/libbfd.h: Rebuilt. * gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs, mcf5329_control_regs): New. (not_current_architecture, selected_arch, selected_cpu): New. (m68k_archs, m68k_extensions): New. (archs): Renamed to ... (m68k_cpus): ... here. Adjust. (n_arches): Remove. (md_pseudo_table): Add arch and cpu directives. (find_cf_chip, m68k_ip): Adjust table scanning. (no_68851, no_68881): Remove. (md_assemble): Lazily initialize. (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329. (md_init_after_args): Move functionality to m68k_init_arch. (mri_chip): Adjust table scanning. (md_parse_option): Reimplement 'm' processing to add -march & -mcpu options with saner parsing. (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension, m68k_init_arch): New. (s_m68k_cpu, s_m68k_arch): New. (md_show_usage): Adjust. (m68k_elf_final_processing): Set CF EF flags. * gas/config/tc-m68k.h (m68k_init_after_args): Remove. (tc_init_after_args): Remove. * gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options. (M68k-Directives): Document .arch and .cpu directives. * gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test. * gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New. * include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ... (EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here. (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New. * include/opcode/m68k.h (m68008, m68ec030, m68882): Remove. (m68k_mask): New. (cpu_m68k, cpu_cf): New. (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407, mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants. * opcodes/m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features. * binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-01-26* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,David Ung2-48/+56
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d, floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d, nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d, rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
2006-01-18fixes related to indexed operandsArnold Metselaar2-17/+28
2006-01-17Use unsigned char to hold data to be disassembled.Arnold Metselaar2-6/+11
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